| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 21 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
35 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
38 #define DEBUG_RL_FULL_D(d, l) macro
429 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
431 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
433 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
435 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
783 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
785 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
787 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 21 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
35 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
38 #define DEBUG_RL_FULL_D(d, l) macro
429 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
431 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
433 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
435 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
783 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
785 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
787 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 21 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
35 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
38 #define DEBUG_RL_FULL_D(d, l) macro
429 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
431 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
433 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
435 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
783 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
785 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
787 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 21 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
35 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
38 #define DEBUG_RL_FULL_D(d, l) macro
429 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
431 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
433 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
435 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
783 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
785 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
787 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 22 DEBUG_RL_FULL_S(s); DEBUG_RL_FULL_D(d, l); DEBUG_RL_FULL_S("\n")
36 #define DEBUG_RL_FULL_D(d, l) printf("%x", d) macro
39 #define DEBUG_RL_FULL_D(d, l) macro
430 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
432 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_rl_mode()
434 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_rl_mode()
436 DEBUG_RL_FULL_D(delay, 2); in ddr3_read_leveling_single_cs_rl_mode()
784 DEBUG_RL_FULL_D(rd_sample_delay, 2); in ddr3_read_leveling_single_cs_window_mode()
786 DEBUG_RL_FULL_D(dram_info->rd_rdy_dly, 2); in ddr3_read_leveling_single_cs_window_mode()
788 DEBUG_RL_FULL_D(phase, 1); in ddr3_read_leveling_single_cs_window_mode()
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