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Searched refs:DEFINE_PROP_BOOL (Results 1 – 25 of 813) sorted by relevance

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/dports/emulators/qemu5/qemu-5.2.0/target/microblaze/
H A Dcpu.c255 DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
274 DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
275 DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
278 DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
281 DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
283 DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
286 DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
288 DEFINE_PROP_BOOL("ill-opcode-exception", MicroBlazeCPU,
290 DEFINE_PROP_BOOL("div-zero-exception", MicroBlazeCPU,
292 DEFINE_PROP_BOOL("unaligned-exceptions", MicroBlazeCPU,
[all …]
/dports/emulators/qemu60/qemu-6.0.0/target/microblaze/
H A Dcpu.c292 DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
311 DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
312 DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
315 DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
328 DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
330 DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
333 DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
335 DEFINE_PROP_BOOL("ill-opcode-exception", MicroBlazeCPU,
337 DEFINE_PROP_BOOL("div-zero-exception", MicroBlazeCPU,
339 DEFINE_PROP_BOOL("unaligned-exceptions", MicroBlazeCPU,
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/riscv/
H A Dcpu.c619 DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
621 DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, true),
622 DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true),
623 DEFINE_PROP_BOOL("a", RISCVCPU, cfg.ext_a, true),
624 DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true),
625 DEFINE_PROP_BOOL("d", RISCVCPU, cfg.ext_d, true),
626 DEFINE_PROP_BOOL("c", RISCVCPU, cfg.ext_c, true),
627 DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
628 DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
632 DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/microblaze/
H A Dcpu.c292 DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
311 DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
312 DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
315 DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
328 DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
330 DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
333 DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
335 DEFINE_PROP_BOOL("ill-opcode-exception", MicroBlazeCPU,
337 DEFINE_PROP_BOOL("div-zero-exception", MicroBlazeCPU,
339 DEFINE_PROP_BOOL("unaligned-exceptions", MicroBlazeCPU,
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/microblaze/
H A Dcpu.c292 DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
311 DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
312 DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
315 DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
328 DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
330 DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
333 DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
335 DEFINE_PROP_BOOL("ill-opcode-exception", MicroBlazeCPU,
337 DEFINE_PROP_BOOL("div-zero-exception", MicroBlazeCPU,
339 DEFINE_PROP_BOOL("unaligned-exceptions", MicroBlazeCPU,
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/target/microblaze/
H A Dcpu.c244 DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
263 DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
264 DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
265 DEFINE_PROP_BOOL("use-msr-instr", MicroBlazeCPU, cfg.use_msr_instr, true),
266 DEFINE_PROP_BOOL("use-pcmp-instr", MicroBlazeCPU, cfg.use_pcmp_instr, true),
267 DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
268 DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
270 DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
272 DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
275 DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/microblaze/
H A Dcpu.c244 DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
263 DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
264 DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
265 DEFINE_PROP_BOOL("use-msr-instr", MicroBlazeCPU, cfg.use_msr_instr, true),
266 DEFINE_PROP_BOOL("use-pcmp-instr", MicroBlazeCPU, cfg.use_pcmp_instr, true),
267 DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
268 DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
270 DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
272 DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
275 DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
/dports/emulators/qemu42/qemu-4.2.1/target/microblaze/
H A Dcpu.c244 DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
263 DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
264 DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
265 DEFINE_PROP_BOOL("use-msr-instr", MicroBlazeCPU, cfg.use_msr_instr, true),
266 DEFINE_PROP_BOOL("use-pcmp-instr", MicroBlazeCPU, cfg.use_pcmp_instr, true),
267 DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
268 DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
270 DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
272 DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
275 DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/microblaze/
H A Dcpu.c244 DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
263 DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
264 DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
265 DEFINE_PROP_BOOL("use-msr-instr", MicroBlazeCPU, cfg.use_msr_instr, true),
266 DEFINE_PROP_BOOL("use-pcmp-instr", MicroBlazeCPU, cfg.use_pcmp_instr, true),
267 DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
268 DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
270 DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
272 DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
275 DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
/dports/emulators/qemu5/qemu-5.2.0/target/riscv/
H A Dcpu.c503 DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
505 DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, true),
506 DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true),
507 DEFINE_PROP_BOOL("a", RISCVCPU, cfg.ext_a, true),
508 DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true),
509 DEFINE_PROP_BOOL("d", RISCVCPU, cfg.ext_d, true),
510 DEFINE_PROP_BOOL("c", RISCVCPU, cfg.ext_c, true),
511 DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
512 DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
523 DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/
H A Dcpu.c485 DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
487 DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, true),
488 DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true),
489 DEFINE_PROP_BOOL("a", RISCVCPU, cfg.ext_a, true),
490 DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true),
491 DEFINE_PROP_BOOL("d", RISCVCPU, cfg.ext_d, true),
492 DEFINE_PROP_BOOL("c", RISCVCPU, cfg.ext_c, true),
493 DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
494 DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
501 DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/
H A Dcpu.c608 DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
610 DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, true),
611 DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true),
612 DEFINE_PROP_BOOL("a", RISCVCPU, cfg.ext_a, true),
613 DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true),
614 DEFINE_PROP_BOOL("d", RISCVCPU, cfg.ext_d, true),
615 DEFINE_PROP_BOOL("c", RISCVCPU, cfg.ext_c, true),
616 DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
617 DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
630 DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/
H A Dcpu.c437 DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
439 DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, true),
440 DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true),
441 DEFINE_PROP_BOOL("a", RISCVCPU, cfg.ext_a, true),
442 DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true),
443 DEFINE_PROP_BOOL("d", RISCVCPU, cfg.ext_d, true),
444 DEFINE_PROP_BOOL("c", RISCVCPU, cfg.ext_c, true),
445 DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
446 DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
451 DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
[all …]
/dports/emulators/qemu42/qemu-4.2.1/target/riscv/
H A Dcpu.c437 DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
439 DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, true),
440 DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true),
441 DEFINE_PROP_BOOL("a", RISCVCPU, cfg.ext_a, true),
442 DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true),
443 DEFINE_PROP_BOOL("d", RISCVCPU, cfg.ext_d, true),
444 DEFINE_PROP_BOOL("c", RISCVCPU, cfg.ext_c, true),
445 DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
446 DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
451 DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
[all …]
/dports/emulators/qemu60/qemu-6.0.0/target/riscv/
H A Dcpu.c535 DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
537 DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, true),
538 DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true),
539 DEFINE_PROP_BOOL("a", RISCVCPU, cfg.ext_a, true),
540 DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true),
541 DEFINE_PROP_BOOL("d", RISCVCPU, cfg.ext_d, true),
542 DEFINE_PROP_BOOL("c", RISCVCPU, cfg.ext_c, true),
543 DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
544 DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
555 DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/microblaze/
H A Dcpu.c241 DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
260 DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
261 DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
262 DEFINE_PROP_BOOL("use-msr-instr", MicroBlazeCPU, cfg.use_msr_instr, true),
263 DEFINE_PROP_BOOL("use-pcmp-instr", MicroBlazeCPU, cfg.use_pcmp_instr, true),
264 DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
265 DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
267 DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/
H A Dcpu.c732 DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
734 DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, true),
735 DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true),
736 DEFINE_PROP_BOOL("a", RISCVCPU, cfg.ext_a, true),
737 DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true),
738 DEFINE_PROP_BOOL("d", RISCVCPU, cfg.ext_d, true),
739 DEFINE_PROP_BOOL("c", RISCVCPU, cfg.ext_c, true),
740 DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
741 DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
751 DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/i386/
H A Dx86-iommu.c105 DEFINE_PROP_BOOL("intremap", X86IOMMUState, intr_supported, false),
106 DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false),
107 DEFINE_PROP_BOOL("pt", X86IOMMUState, pt_supported, true),
/dports/emulators/qemu60/qemu-6.0.0/hw/arm/
H A Darmv7m.c259 DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
260 DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
262 DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
263 DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
/dports/emulators/qemu5/qemu-5.2.0/hw/arm/
H A Darmv7m.c260 DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
261 DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
263 DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
264 DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
/dports/emulators/qemu42/qemu-4.2.1/hw/arm/
H A Darmv7m.c278 DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
279 DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
281 DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
282 DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
/dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/
H A Darmv7m.c278 DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
279 DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
281 DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
282 DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/arm/
H A Darmv7m.c278 DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
279 DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
281 DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
282 DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/arm/
H A Darmv7m.c278 DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
279 DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
281 DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
282 DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
/dports/emulators/qemu/qemu-6.2.0/hw/usb/
H A Ddev-storage-classic.c86 DEFINE_PROP_BOOL("removable", MSDState, removable, false),
87 DEFINE_PROP_BOOL("commandlog", MSDState, commandlog, false),

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