Home
last modified time | relevance | path

Searched refs:DEFINE_PROP_SIZE (Results 1 – 25 of 92) sorted by relevance

1234

/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/pci-bridge/
H A Dgen_pcie_root_port.c119 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort,
121 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort,
123 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort,
125 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
H A Dpci_bridge_dev.c180 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
182 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
184 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
186 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
/dports/emulators/qemu42/qemu-4.2.1/hw/pci-bridge/
H A Dgen_pcie_root_port.c125 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort,
127 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort,
129 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort,
131 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
H A Dpci_bridge_dev.c182 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
184 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
186 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
188 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
/dports/emulators/qemu5/qemu-5.2.0/hw/pci-bridge/
H A Dgen_pcie_root_port.c125 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort,
127 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort,
129 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort,
131 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
H A Dpci_bridge_dev.c181 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
183 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
185 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
187 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
/dports/emulators/qemu60/qemu-6.0.0/hw/pci-bridge/
H A Dgen_pcie_root_port.c126 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort,
128 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort,
130 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort,
132 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
H A Dpci_bridge_dev.c181 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
183 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
185 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
187 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
/dports/emulators/qemu-utils/qemu-4.2.1/hw/pci-bridge/
H A Dgen_pcie_root_port.c125 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort,
127 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort,
129 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort,
131 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
H A Dpci_bridge_dev.c182 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
184 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
186 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
188 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/pci-bridge/
H A Dgen_pcie_root_port.c125 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort,
127 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort,
129 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort,
131 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
H A Dpci_bridge_dev.c182 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
184 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
186 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
188 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/pci-bridge/
H A Dgen_pcie_root_port.c125 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort,
127 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort,
129 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort,
131 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
H A Dpci_bridge_dev.c182 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
184 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
186 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
188 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
/dports/emulators/qemu/qemu-6.2.0/hw/pci-bridge/
H A Dgen_pcie_root_port.c131 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort,
133 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort,
135 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort,
137 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
H A Dpci_bridge_dev.c181 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
183 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
185 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
187 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/pci-bridge/
H A Dgen_pcie_root_port.c131 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort,
133 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort,
135 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort,
137 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
H A Dpci_bridge_dev.c181 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
183 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
185 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
187 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
/dports/emulators/qemu42/qemu-4.2.1/hw/pci-host/
H A Dxilinx-pcie.c163 DEFINE_PROP_SIZE("cfg_base", XilinxPCIEHost, cfg_base, 0),
164 DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 * MiB),
165 DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
166 DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),
/dports/emulators/qemu/qemu-6.2.0/hw/pci-host/
H A Dxilinx-pcie.c161 DEFINE_PROP_SIZE("cfg_base", XilinxPCIEHost, cfg_base, 0),
162 DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 * MiB),
163 DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
164 DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),
/dports/emulators/qemu5/qemu-5.2.0/hw/pci-host/
H A Dxilinx-pcie.c161 DEFINE_PROP_SIZE("cfg_base", XilinxPCIEHost, cfg_base, 0),
162 DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 * MiB),
163 DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
164 DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),
/dports/emulators/qemu60/qemu-6.0.0/hw/pci-host/
H A Dxilinx-pcie.c161 DEFINE_PROP_SIZE("cfg_base", XilinxPCIEHost, cfg_base, 0),
162 DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 * MiB),
163 DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
164 DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),
/dports/emulators/qemu-utils/qemu-4.2.1/hw/pci-host/
H A Dxilinx-pcie.c163 DEFINE_PROP_SIZE("cfg_base", XilinxPCIEHost, cfg_base, 0),
164 DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 * MiB),
165 DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
166 DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/pci-host/
H A Dxilinx-pcie.c160 DEFINE_PROP_SIZE("cfg_base", XilinxPCIEHost, cfg_base, 0),
161 DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 * MiB),
162 DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
163 DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/pci-host/
H A Dxilinx-pcie.c163 DEFINE_PROP_SIZE("cfg_base", XilinxPCIEHost, cfg_base, 0),
164 DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 * MiB),
165 DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
166 DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),

1234