/dports/emulators/qemu42/qemu-4.2.1/include/hw/block/ |
H A D | block.h | 55 DEFINE_PROP_UINT32("opt_io_size", _state, _conf.opt_io_size, 0), \ 56 DEFINE_PROP_UINT32("discard_granularity", _state, \ 67 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \ 68 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \ 69 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0), \ 70 DEFINE_PROP_UINT32("lcyls", _state, _conf.lcyls, 0), \ 71 DEFINE_PROP_UINT32("lheads", _state, _conf.lheads, 0), \ 72 DEFINE_PROP_UINT32("lsecs", _state, _conf.lsecs, 0)
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/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/block/ |
H A D | block.h | 55 DEFINE_PROP_UINT32("opt_io_size", _state, _conf.opt_io_size, 0), \ 56 DEFINE_PROP_UINT32("discard_granularity", _state, \ 67 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \ 68 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \ 69 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0), \ 70 DEFINE_PROP_UINT32("lcyls", _state, _conf.lcyls, 0), \ 71 DEFINE_PROP_UINT32("lheads", _state, _conf.lheads, 0), \ 72 DEFINE_PROP_UINT32("lsecs", _state, _conf.lsecs, 0)
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/block/ |
H A D | block.h | 55 DEFINE_PROP_UINT32("opt_io_size", _state, _conf.opt_io_size, 0), \ 56 DEFINE_PROP_UINT32("discard_granularity", _state, \ 67 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \ 68 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \ 69 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0), \ 70 DEFINE_PROP_UINT32("lcyls", _state, _conf.lcyls, 0), \ 71 DEFINE_PROP_UINT32("lheads", _state, _conf.lheads, 0), \ 72 DEFINE_PROP_UINT32("lsecs", _state, _conf.lsecs, 0)
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/block/ |
H A D | block.h | 55 DEFINE_PROP_UINT32("opt_io_size", _state, _conf.opt_io_size, 0), \ 56 DEFINE_PROP_UINT32("discard_granularity", _state, \ 67 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \ 68 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \ 69 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0), \ 70 DEFINE_PROP_UINT32("lcyls", _state, _conf.lcyls, 0), \ 71 DEFINE_PROP_UINT32("lheads", _state, _conf.lheads, 0), \ 72 DEFINE_PROP_UINT32("lsecs", _state, _conf.lsecs, 0)
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/dports/emulators/qemu60/qemu-6.0.0/hw/intc/ |
H A D | ibex_plic.c | 227 DEFINE_PROP_UINT32("num-cpus", IbexPlicState, num_cpus, 1), 228 DEFINE_PROP_UINT32("num-sources", IbexPlicState, num_sources, 80), 230 DEFINE_PROP_UINT32("pending-base", IbexPlicState, pending_base, 0), 231 DEFINE_PROP_UINT32("pending-num", IbexPlicState, pending_num, 3), 233 DEFINE_PROP_UINT32("source-base", IbexPlicState, source_base, 0x0c), 234 DEFINE_PROP_UINT32("source-num", IbexPlicState, source_num, 3), 236 DEFINE_PROP_UINT32("priority-base", IbexPlicState, priority_base, 0x18), 237 DEFINE_PROP_UINT32("priority-num", IbexPlicState, priority_num, 80), 239 DEFINE_PROP_UINT32("enable-base", IbexPlicState, enable_base, 0x200), 240 DEFINE_PROP_UINT32("enable-num", IbexPlicState, enable_num, 3), [all …]
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H A D | sifive_clint.c | 192 DEFINE_PROP_UINT32("hartid-base", SiFiveCLINTState, hartid_base, 0), 193 DEFINE_PROP_UINT32("num-harts", SiFiveCLINTState, num_harts, 0), 194 DEFINE_PROP_UINT32("sip-base", SiFiveCLINTState, sip_base, 0), 195 DEFINE_PROP_UINT32("timecmp-base", SiFiveCLINTState, timecmp_base, 0), 196 DEFINE_PROP_UINT32("time-base", SiFiveCLINTState, time_base, 0), 197 DEFINE_PROP_UINT32("aperture-size", SiFiveCLINTState, aperture_size, 0), 198 DEFINE_PROP_UINT32("timebase-freq", SiFiveCLINTState, timebase_freq, 0),
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/dports/emulators/qemu5/qemu-5.2.0/hw/intc/ |
H A D | ibex_plic.c | 220 DEFINE_PROP_UINT32("num-cpus", IbexPlicState, num_cpus, 1), 221 DEFINE_PROP_UINT32("num-sources", IbexPlicState, num_sources, 80), 223 DEFINE_PROP_UINT32("pending-base", IbexPlicState, pending_base, 0), 224 DEFINE_PROP_UINT32("pending-num", IbexPlicState, pending_num, 3), 226 DEFINE_PROP_UINT32("source-base", IbexPlicState, source_base, 0x0c), 227 DEFINE_PROP_UINT32("source-num", IbexPlicState, source_num, 3), 229 DEFINE_PROP_UINT32("priority-base", IbexPlicState, priority_base, 0x18), 230 DEFINE_PROP_UINT32("priority-num", IbexPlicState, priority_num, 80), 232 DEFINE_PROP_UINT32("enable-base", IbexPlicState, enable_base, 0x200), 233 DEFINE_PROP_UINT32("enable-num", IbexPlicState, enable_num, 3), [all …]
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H A D | sifive_clint.c | 192 DEFINE_PROP_UINT32("hartid-base", SiFiveCLINTState, hartid_base, 0), 193 DEFINE_PROP_UINT32("num-harts", SiFiveCLINTState, num_harts, 0), 194 DEFINE_PROP_UINT32("sip-base", SiFiveCLINTState, sip_base, 0), 195 DEFINE_PROP_UINT32("timecmp-base", SiFiveCLINTState, timecmp_base, 0), 196 DEFINE_PROP_UINT32("time-base", SiFiveCLINTState, time_base, 0), 197 DEFINE_PROP_UINT32("aperture-size", SiFiveCLINTState, aperture_size, 0), 198 DEFINE_PROP_UINT32("timebase-freq", SiFiveCLINTState, timebase_freq, 0),
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/ |
H A D | ibex_plic.c | 219 DEFINE_PROP_UINT32("num-cpus", IbexPlicState, num_cpus, 1), 220 DEFINE_PROP_UINT32("num-sources", IbexPlicState, num_sources, 176), 222 DEFINE_PROP_UINT32("pending-base", IbexPlicState, pending_base, 0), 223 DEFINE_PROP_UINT32("pending-num", IbexPlicState, pending_num, 6), 225 DEFINE_PROP_UINT32("source-base", IbexPlicState, source_base, 0x18), 226 DEFINE_PROP_UINT32("source-num", IbexPlicState, source_num, 6), 228 DEFINE_PROP_UINT32("priority-base", IbexPlicState, priority_base, 0x30), 229 DEFINE_PROP_UINT32("priority-num", IbexPlicState, priority_num, 177), 231 DEFINE_PROP_UINT32("enable-base", IbexPlicState, enable_base, 0x300), 232 DEFINE_PROP_UINT32("enable-num", IbexPlicState, enable_num, 6), [all …]
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H A D | riscv_aclint.c | 215 DEFINE_PROP_UINT32("hartid-base", RISCVAclintMTimerState, 217 DEFINE_PROP_UINT32("num-harts", RISCVAclintMTimerState, num_harts, 1), 218 DEFINE_PROP_UINT32("timecmp-base", RISCVAclintMTimerState, 220 DEFINE_PROP_UINT32("time-base", RISCVAclintMTimerState, 222 DEFINE_PROP_UINT32("aperture-size", RISCVAclintMTimerState, 224 DEFINE_PROP_UINT32("timebase-freq", RISCVAclintMTimerState, 381 DEFINE_PROP_UINT32("hartid-base", RISCVAclintSwiState, hartid_base, 0), 382 DEFINE_PROP_UINT32("num-harts", RISCVAclintSwiState, num_harts, 1), 383 DEFINE_PROP_UINT32("sswi", RISCVAclintSwiState, sswi, false),
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/dports/emulators/qemu/qemu-6.2.0/include/hw/display/ |
H A D | edid.h | 26 DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \ 27 DEFINE_PROP_UINT32("yres", _state, _edid_info.prefy, 0), \ 28 DEFINE_PROP_UINT32("xmax", _state, _edid_info.maxx, 0), \ 29 DEFINE_PROP_UINT32("ymax", _state, _edid_info.maxy, 0), \ 30 DEFINE_PROP_UINT32("refresh_rate", _state, _edid_info.refresh_rate, 0)
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/display/ |
H A D | edid.h | 26 DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \ 27 DEFINE_PROP_UINT32("yres", _state, _edid_info.prefy, 0), \ 28 DEFINE_PROP_UINT32("xmax", _state, _edid_info.maxx, 0), \ 29 DEFINE_PROP_UINT32("ymax", _state, _edid_info.maxy, 0), \ 30 DEFINE_PROP_UINT32("refresh_rate", _state, _edid_info.refresh_rate, 0)
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/dports/emulators/qemu/qemu-6.2.0/include/hw/block/ |
H A D | block.h | 71 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \ 72 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \ 73 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0), \ 74 DEFINE_PROP_UINT32("lcyls", _state, _conf.lcyls, 0), \ 75 DEFINE_PROP_UINT32("lheads", _state, _conf.lheads, 0), \ 76 DEFINE_PROP_UINT32("lsecs", _state, _conf.lsecs, 0)
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/dports/emulators/qemu60/qemu-6.0.0/include/hw/block/ |
H A D | block.h | 68 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \ 69 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \ 70 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0), \ 71 DEFINE_PROP_UINT32("lcyls", _state, _conf.lcyls, 0), \ 72 DEFINE_PROP_UINT32("lheads", _state, _conf.lheads, 0), \ 73 DEFINE_PROP_UINT32("lsecs", _state, _conf.lsecs, 0)
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/dports/emulators/qemu5/qemu-5.2.0/include/hw/block/ |
H A D | block.h | 67 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \ 68 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \ 69 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0), \ 70 DEFINE_PROP_UINT32("lcyls", _state, _conf.lcyls, 0), \ 71 DEFINE_PROP_UINT32("lheads", _state, _conf.lheads, 0), \ 72 DEFINE_PROP_UINT32("lsecs", _state, _conf.lsecs, 0)
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/block/ |
H A D | block.h | 71 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \ 72 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \ 73 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0), \ 74 DEFINE_PROP_UINT32("lcyls", _state, _conf.lcyls, 0), \ 75 DEFINE_PROP_UINT32("lheads", _state, _conf.lheads, 0), \ 76 DEFINE_PROP_UINT32("lsecs", _state, _conf.lsecs, 0)
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/dports/emulators/qemu42/qemu-4.2.1/include/hw/display/ |
H A D | edid.h | 24 DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \ 25 DEFINE_PROP_UINT32("yres", _state, _edid_info.prefy, 0), \ 26 DEFINE_PROP_UINT32("xmax", _state, _edid_info.maxx, 0), \ 27 DEFINE_PROP_UINT32("ymax", _state, _edid_info.maxy, 0)
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/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/display/ |
H A D | edid.h | 24 DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \ 25 DEFINE_PROP_UINT32("yres", _state, _edid_info.prefy, 0), \ 26 DEFINE_PROP_UINT32("xmax", _state, _edid_info.maxx, 0), \ 27 DEFINE_PROP_UINT32("ymax", _state, _edid_info.maxy, 0)
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/display/ |
H A D | edid.h | 24 DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \ 25 DEFINE_PROP_UINT32("yres", _state, _edid_info.prefy, 0), \ 26 DEFINE_PROP_UINT32("xmax", _state, _edid_info.maxx, 0), \ 27 DEFINE_PROP_UINT32("ymax", _state, _edid_info.maxy, 0)
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/display/ |
H A D | edid.h | 24 DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \ 25 DEFINE_PROP_UINT32("yres", _state, _edid_info.prefy, 0), \ 26 DEFINE_PROP_UINT32("xmax", _state, _edid_info.maxx, 0), \ 27 DEFINE_PROP_UINT32("ymax", _state, _edid_info.maxy, 0)
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/block/ |
H A D | block.h | 55 DEFINE_PROP_UINT32("opt_io_size", _state, _conf.opt_io_size, 0), \ 56 DEFINE_PROP_UINT32("discard_granularity", _state, \ 63 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \ 64 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \ 65 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0)
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/dports/emulators/qemu60/qemu-6.0.0/include/hw/display/ |
H A D | edid.h | 25 DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \ 26 DEFINE_PROP_UINT32("yres", _state, _edid_info.prefy, 0), \ 27 DEFINE_PROP_UINT32("xmax", _state, _edid_info.maxx, 0), \ 28 DEFINE_PROP_UINT32("ymax", _state, _edid_info.maxy, 0)
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/dports/emulators/qemu5/qemu-5.2.0/include/hw/display/ |
H A D | edid.h | 25 DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \ 26 DEFINE_PROP_UINT32("yres", _state, _edid_info.prefy, 0), \ 27 DEFINE_PROP_UINT32("xmax", _state, _edid_info.maxx, 0), \ 28 DEFINE_PROP_UINT32("ymax", _state, _edid_info.maxy, 0)
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/dports/emulators/qemu/qemu-6.2.0/hw/intc/ |
H A D | riscv_aclint.c | 215 DEFINE_PROP_UINT32("hartid-base", RISCVAclintMTimerState, 217 DEFINE_PROP_UINT32("num-harts", RISCVAclintMTimerState, num_harts, 1), 218 DEFINE_PROP_UINT32("timecmp-base", RISCVAclintMTimerState, 220 DEFINE_PROP_UINT32("time-base", RISCVAclintMTimerState, 222 DEFINE_PROP_UINT32("aperture-size", RISCVAclintMTimerState, 224 DEFINE_PROP_UINT32("timebase-freq", RISCVAclintMTimerState, 381 DEFINE_PROP_UINT32("hartid-base", RISCVAclintSwiState, hartid_base, 0), 382 DEFINE_PROP_UINT32("num-harts", RISCVAclintSwiState, num_harts, 1), 383 DEFINE_PROP_UINT32("sswi", RISCVAclintSwiState, sswi, false),
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/dports/emulators/qemu42/qemu-4.2.1/hw/misc/ |
H A D | mps2-scc.c | 275 DEFINE_PROP_UINT32("scc-cfg4", MPS2SCC, cfg4, 0), 276 DEFINE_PROP_UINT32("scc-aid", MPS2SCC, aid, 0), 277 DEFINE_PROP_UINT32("scc-id", MPS2SCC, id, 0), 283 DEFINE_PROP_UINT32("oscclk0", MPS2SCC, oscclk_reset[0], 50000000), 284 DEFINE_PROP_UINT32("oscclk1", MPS2SCC, oscclk_reset[1], 24576000), 285 DEFINE_PROP_UINT32("oscclk2", MPS2SCC, oscclk_reset[2], 25000000),
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