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Searched refs:DEFINE_PROP_UINT8 (Results 1 – 25 of 505) sorted by relevance

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/dports/emulators/qemu/qemu-6.2.0/hw/adc/
H A Dmax111x.c160 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
161 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
162 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
163 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
169 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
170 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
171 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
172 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
173 DEFINE_PROP_UINT8("input4", MAX111xState, reset_input[4], 0xb0),
174 DEFINE_PROP_UINT8("input5", MAX111xState, reset_input[5], 0xa0),
[all …]
/dports/emulators/qemu60/qemu-6.0.0/hw/misc/
H A Dmax111x.c160 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
161 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
162 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
163 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
169 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
170 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
171 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
172 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
173 DEFINE_PROP_UINT8("input4", MAX111xState, reset_input[4], 0xb0),
174 DEFINE_PROP_UINT8("input5", MAX111xState, reset_input[5], 0xa0),
[all …]
H A Dmsf2-sysreg.c123 DEFINE_PROP_UINT8("apb0divisor", MSF2SysregState, apb0div, 2),
124 DEFINE_PROP_UINT8("apb1divisor", MSF2SysregState, apb1div, 2),
/dports/emulators/qemu5/qemu-5.2.0/hw/misc/
H A Dmax111x.c160 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
161 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
162 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
163 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
169 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
170 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
171 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
172 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
173 DEFINE_PROP_UINT8("input4", MAX111xState, reset_input[4], 0xb0),
174 DEFINE_PROP_UINT8("input5", MAX111xState, reset_input[5], 0xa0),
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/adc/
H A Dmax111x.c160 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
161 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
162 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
163 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
169 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
170 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
171 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
172 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
173 DEFINE_PROP_UINT8("input4", MAX111xState, reset_input[4], 0xb0),
174 DEFINE_PROP_UINT8("input5", MAX111xState, reset_input[5], 0xa0),
[all …]
/dports/emulators/qemu60/qemu-6.0.0/target/microblaze/
H A Dcpu.c301 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
306 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
310 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
325 DEFINE_PROP_UINT8("use-non-secure", MicroBlazeCPU, cfg.use_non_secure, 0),
344 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
345 DEFINE_PROP_UINT8("pvr-user1", MicroBlazeCPU, cfg.pvr_user1, 0),
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/microblaze/
H A Dcpu.c301 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
306 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
310 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
325 DEFINE_PROP_UINT8("use-non-secure", MicroBlazeCPU, cfg.use_non_secure, 0),
344 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
345 DEFINE_PROP_UINT8("pvr-user1", MicroBlazeCPU, cfg.pvr_user1, 0),
/dports/emulators/qemu/qemu-6.2.0/target/microblaze/
H A Dcpu.c301 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
306 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
310 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
325 DEFINE_PROP_UINT8("use-non-secure", MicroBlazeCPU, cfg.use_non_secure, 0),
344 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
345 DEFINE_PROP_UINT8("pvr-user1", MicroBlazeCPU, cfg.pvr_user1, 0),
/dports/emulators/qemu5/qemu-5.2.0/target/microblaze/
H A Dcpu.c264 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
269 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
273 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
297 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
298 DEFINE_PROP_UINT8("pvr-user1", MicroBlazeCPU, cfg.pvr_user1, 0),
/dports/emulators/qemu-utils/qemu-4.2.1/target/microblaze/
H A Dcpu.c253 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
258 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
262 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
278 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/microblaze/
H A Dcpu.c253 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
258 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
262 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
278 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
/dports/emulators/qemu42/qemu-4.2.1/target/microblaze/
H A Dcpu.c253 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
258 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
262 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
278 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/microblaze/
H A Dcpu.c250 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
255 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
259 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
269 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/microblaze/
H A Dcpu.c253 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
258 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
262 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
278 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
/dports/emulators/qemu/qemu-6.2.0/hw/sd/
H A Dsdhci-internal.h331 DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
332 DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \
333 DEFINE_PROP_UINT8("vendor", _state, vendor, SDHCI_VENDOR_NONE), \
/dports/emulators/qemu60/qemu-6.0.0/hw/sd/
H A Dsdhci-internal.h331 DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
332 DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \
333 DEFINE_PROP_UINT8("vendor", _state, vendor, SDHCI_VENDOR_NONE), \
/dports/emulators/qemu5/qemu-5.2.0/hw/sd/
H A Dsdhci-internal.h331 DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
332 DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \
333 DEFINE_PROP_UINT8("vendor", _state, vendor, SDHCI_VENDOR_NONE), \
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/sd/
H A Dsdhci-internal.h331 DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
332 DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \
333 DEFINE_PROP_UINT8("vendor", _state, vendor, SDHCI_VENDOR_NONE), \
/dports/emulators/qemu42/qemu-4.2.1/hw/pci/
H A Dpcie_port.c125 DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
148 DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
/dports/emulators/qemu42/qemu-4.2.1/hw/misc/
H A Dmsf2-sysreg.c123 DEFINE_PROP_UINT8("apb0divisor", MSF2SysregState, apb0div, 2),
124 DEFINE_PROP_UINT8("apb1divisor", MSF2SysregState, apb1div, 2),
/dports/emulators/qemu/qemu-6.2.0/hw/misc/
H A Dmsf2-sysreg.c123 DEFINE_PROP_UINT8("apb0divisor", MSF2SysregState, apb0div, 2),
124 DEFINE_PROP_UINT8("apb1divisor", MSF2SysregState, apb1div, 2),
/dports/emulators/qemu/qemu-6.2.0/hw/pci/
H A Dpcie_port.c125 DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
148 DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
/dports/emulators/qemu60/qemu-6.0.0/hw/pci/
H A Dpcie_port.c125 DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
148 DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/pci/
H A Dpcie_port.c123 DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
146 DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/misc/
H A Dmsf2-sysreg.c120 DEFINE_PROP_UINT8("apb0divisor", MSF2SysregState, apb0div, 2),
121 DEFINE_PROP_UINT8("apb1divisor", MSF2SysregState, apb1div, 2),

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