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Searched refs:DIVSDrr (Results 1 – 25 of 108) sorted by relevance

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/dports/lang/racket-minimal/racket-8.3/src/bc/src/lightning/i386/
H A Dfp-sse.h79 ? DIVSDrr(f2, f0) \
81 ? (MOVSDrr(f0, JIT_FPTMP0), MOVSDrr(f1, f0), DIVSDrr(JIT_FPTMP0, f0)) \
82 : (MOVSDrr(f1, f0), DIVSDrr(f2, f0))))
H A Dasm.h1449 #define DIVSDrr(RS, RD) _SSESDrr(X86_SSE_DIV, RS, RD) macro
/dports/lang/racket/racket-8.3/src/bc/src/lightning/i386/
H A Dfp-sse.h79 ? DIVSDrr(f2, f0) \
81 ? (MOVSDrr(f0, JIT_FPTMP0), MOVSDrr(f1, f0), DIVSDrr(JIT_FPTMP0, f0)) \
82 : (MOVSDrr(f1, f0), DIVSDrr(f2, f0))))
H A Dasm.h1449 #define DIVSDrr(RS, RD) _SSESDrr(X86_SSE_DIV, RS, RD) macro
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: [[DIVSDrr:%[0-9]+]]:fr64 = DIVSDrr [[COPY1]], [[COPY3]]
117 ; SSE: [[COPY4:%[0-9]+]]:vr128 = COPY [[DIVSDrr]]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: [[DIVSDrr:%[0-9]+]]:fr64 = DIVSDrr [[COPY1]], [[COPY3]]
117 ; SSE: [[COPY4:%[0-9]+]]:vr128 = COPY [[DIVSDrr]]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: [[DIVSDrr:%[0-9]+]]:fr64 = DIVSDrr [[COPY1]], [[COPY3]]
117 ; SSE: [[COPY4:%[0-9]+]]:vr128 = COPY [[DIVSDrr]]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: [[DIVSDrr:%[0-9]+]]:fr64 = DIVSDrr [[COPY1]], [[COPY3]]
117 ; SSE: [[COPY4:%[0-9]+]]:vr128 = COPY [[DIVSDrr]]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: [[DIVSDrr:%[0-9]+]]:fr64 = DIVSDrr [[COPY1]], [[COPY3]]
117 ; SSE: [[COPY4:%[0-9]+]]:vr128 = COPY [[DIVSDrr]]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-fdiv-scalar.mir116 ; SSE: %4:fr64 = nofpexcept DIVSDrr [[COPY1]], [[COPY3]], implicit $mxcsr
/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/
H A DX86GenInstrNames.inc639 DIVSDrr = 626,
/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp530 { X86::DIVSDrr, X86::DIVSDrm, 0 }, in X86InstrInfo()
/dports/emulators/aranym/aranym-1.1.0/src/uae_cpu/compiler/
H A Dcodegen_x86.h1727 #define DIVSDrr(RS, RD) _SSESDrr(X86_SSE_DIV, RS, RD) macro
/dports/emulators/hatari/hatari-2.2.1/src/cpu/jit/
H A Dcodegen_x86.h1727 #define DIVSDrr(RS, RD) _SSESDrr(X86_SSE_DIV, RS, RD) macro
/dports/emulators/fs-uae/fs-uae-3.1.35/src/jit/
H A Dcodegen_x86.h1727 #define DIVSDrr(RS, RD) _SSESDrr(X86_SSE_DIV, RS, RD) macro

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