| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 18 #define DRAM_CLK_MUL 2 macro
81 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
306 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 18 #define DRAM_CLK_MUL 2 macro
81 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
306 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 18 #define DRAM_CLK_MUL 2 macro
81 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
306 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 18 #define DRAM_CLK_MUL 2 macro
81 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
306 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a33.c | 20 #define DRAM_CLK_MUL 2 macro
83 CONFIG_DRAM_CLK * DRAM_CLK_MUL / DRAM_CLK_DIV; in ns_to_t()
308 clock_set_pll11(CONFIG_DRAM_CLK * 1000000 * DRAM_CLK_MUL, in mctl_sys_init()
|