/dports/devel/asl/asl-current/ |
H A D | code3206x.c | 1480 LongWord DReg; in DecodeADDK() local 1488 AddDest(DReg); in DecodeADDK() 1508 AddDest(DReg); in DecodeADD2_SUB2() 1765 LongWord DReg; in DecodeZERO() local 1784 __erg = CodeL(0x17, DReg, DReg, DReg); in DecodeZERO() 1787 __erg = CodeS(0x17, DReg, DReg, DReg); in DecodeZERO() 1790 __erg = CodeD(0x11, DReg, DReg, DReg); in DecodeZERO() 1800 __erg = CodeL(0x37, DReg, DReg, DReg); in DecodeZERO() 1862 AddDest(DReg); in DecodeCmp() 1928 AddDest(DReg); in DecodeLMBD() [all …]
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H A D | codexgate.c | 181 Word DReg, SReg; in DecodeShift() local 204 Word DReg, SReg1, SReg2; in DecodeAriImm() local 236 Word DReg, Src; in DecodeImm8() local 276 WAsmCode[0] = Index | (DReg << 8) | (DReg << 5) | (SReg1 << 2); in DecodeReg23() 288 Word DReg, SReg; in DecodeCPC() local 301 Word DReg, SReg; in DecodeMOV() local 314 Word DReg, SReg; in DecodeBFFFO() local 327 Word DReg, SReg; in DecodeReg12() local 333 WAsmCode[0] = Index | (DReg << 8) | (DReg << 2); in DecodeReg12() 445 Word DReg, Src; in DecodeCmp() local [all …]
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H A D | code8008.c | 172 Byte SReg, DReg; in DecodeMOV() local 177 else if (!DecodeReg(ArgStr[1].Str, &DReg)) WrStrErrorPos(ErrNum_InvReg, &ArgStr[1]); in DecodeMOV() 182 BAsmCode[0] = 0xc0 | (DReg << 3) | SReg; in DecodeMOV() 189 Byte DReg; in DecodeMVI() local 194 else if (!DecodeReg(ArgStr[1].Str, &DReg)) WrStrErrorPos(ErrNum_InvReg, &ArgStr[1]); in DecodeMVI() 202 BAsmCode[0] = 0x06 | (DReg << 3); in DecodeMVI() 210 Byte DReg; in DecodeLXI() local 215 else if (!DecodeReg(ArgStr[1].Str, &DReg)) WrStrErrorPos(ErrNum_InvReg, &ArgStr[1]); in DecodeLXI() 216 else if ((DReg != 1) && (DReg != 3) && (DReg != 5)) WrStrErrorPos(ErrNum_InvReg, &ArgStr[1]); in DecodeLXI() 225 BAsmCode[2] = 0x06 | ((DReg + 1) << 3); in DecodeLXI() [all …]
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H A D | codemic8.c | 162 LongWord Src, DReg; in DecodeALU() local 165 && IsWReg(&ArgStr[1], &DReg, True)) in DecodeALU() 169 DAsmCode[0] = pOrder->Code | (DReg << 8) | (Src << 3); in DecodeALU() 194 LongWord Src, DReg; in DecodeALUI() local 198 && IsWReg(&ArgStr[1], &DReg, True)) in DecodeALUI() 258 LongWord DReg, Src; in DecodeMem() local 261 && IsWReg(&ArgStr[1], &DReg, True)) in DecodeMem() 276 DAsmCode[0] = pOrder->Code | (DReg << 8) | ((Src & 0x1f) << 3); in DecodeMem() 289 LongWord DReg, SReg; in DecodeMemI() local 292 && IsWReg(&ArgStr[1], &DReg, True) in DecodeMemI() [all …]
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H A D | code53c8xx.c | 520 LongWord Tmp, DReg , AriOp = 0xff, ImmVal = 0x100; in DecodeMOVE() local 575 DReg = ImmVal; in DecodeMOVE() 595 switch (DecodeComp(&Parts[2], &DReg)) in DecodeMOVE() 598 DReg = 8; in DecodeMOVE() 616 switch (DecodeComp(&Parts[0], &DReg)) in DecodeMOVE() 619 switch (DecodeComp(&Parts[2], &DReg)) in DecodeMOVE() 622 DReg = 8; in DecodeMOVE() 633 ImmVal = DReg; in DecodeMOVE() 634 switch (DecodeComp(&Parts[2], &DReg)) in DecodeMOVE() 705 DReg = 8; in DecodeMOVE() [all …]
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H A D | code77230.c | 232 LongWord DReg, SReg; in DecodeMOV() local 237 if (!DecodeReg(ArgStr[1].Str, &DReg, DestRegs, DestRegCnt)) in DecodeMOV() 248 AddComp(InstrMove, (SReg << 5) + DReg); in DecodeMOV() 254 LongWord DReg, Src = 0; in DecodeLDI() local 259 if (!DecodeReg(ArgStr[1].Str, &DReg, DestRegs, DestRegCnt)) in DecodeLDI() 268 AddComp(InstrLDI, (Src << 5) + DReg); in DecodeLDI() 285 LongWord DReg; in DecodeALU1() local 290 || (DReg < 16) || (DReg > 23)) in DecodeALU1() 296 AddComp(InstrALU, (Op->Code << 17) + (DReg & 7)); in DecodeALU1() 303 LongWord DReg, SReg; in DecodeALU2() local [all …]
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/dports/misc/mxnet/incubator-mxnet-1.9.0/3rdparty/mkldnn/src/cpu/aarch64/xbyak_aarch64/xbyak_aarch64/ |
H A D | xbyak_aarch64_mnemonic_def.h | 1438 void cmgt(const DReg &vd, const DReg &vn, const DReg &vm); 1439 void cmge(const DReg &vd, const DReg &vn, const DReg &vm); 1440 void sshl(const DReg &vd, const DReg &vn, const DReg &vm); 1450 void add(const DReg &vd, const DReg &vn, const DReg &vm); 1462 void cmhi(const DReg &vd, const DReg &vn, const DReg &vm); 1463 void cmhs(const DReg &vd, const DReg &vn, const DReg &vm); 1474 void sub(const DReg &vd, const DReg &vn, const DReg &vm); 3187 void fmadd(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va); 3188 void fmsub(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va); 3189 void fnmadd(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va); [all …]
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/dports/math/onednn/oneDNN-2.5.1/src/cpu/aarch64/xbyak_aarch64/xbyak_aarch64/ |
H A D | xbyak_aarch64_mnemonic_def.h | 1438 void cmgt(const DReg &vd, const DReg &vn, const DReg &vm); 1439 void cmge(const DReg &vd, const DReg &vn, const DReg &vm); 1440 void sshl(const DReg &vd, const DReg &vn, const DReg &vm); 1450 void add(const DReg &vd, const DReg &vn, const DReg &vm); 1462 void cmhi(const DReg &vd, const DReg &vn, const DReg &vm); 1463 void cmhs(const DReg &vd, const DReg &vn, const DReg &vm); 1474 void sub(const DReg &vd, const DReg &vn, const DReg &vm); 3187 void fmadd(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va); 3188 void fmsub(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va); 3189 void fnmadd(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va); [all …]
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/dports/devel/tigcc/tigcc-0.96.b8_10/tigcc/sources/a68k/ |
H A D | Codegen.c | 291 if (Src.Mode != DReg) in GetObjectCode() 590 if (Src.Mode != DReg) in GetObjectCode() 618 if (Dest.Mode != DReg) in GetObjectCode() 651 if (Dest.Mode == DReg) { in GetObjectCode() 655 if (Src.Mode == DReg) in GetObjectCode() 735 if (Dest.Mode == DReg) in GetObjectCode() 749 if (Src.Mode == DReg) in GetObjectCode() 760 if (Src.Mode == DReg) in GetObjectCode() 789 if ((Src.Mode == DReg) && (Dest.Mode == DReg)) in GetObjectCode() 802 if (Src.Mode == DReg) in GetObjectCode() [all …]
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/dports/lang/erlang-runtime24/otp-OTP-24.1.7/erts/emulator/asmjit/x86/ |
H A D | x86operand.h | 763 static constexpr DReg dr0 = DReg(0); 764 static constexpr DReg dr1 = DReg(1); 765 static constexpr DReg dr2 = DReg(2); 766 static constexpr DReg dr3 = DReg(3); 767 static constexpr DReg dr4 = DReg(4); 768 static constexpr DReg dr5 = DReg(5); 769 static constexpr DReg dr6 = DReg(6); 770 static constexpr DReg dr7 = DReg(7); 771 static constexpr DReg dr8 = DReg(8); 772 static constexpr DReg dr9 = DReg(9); [all …]
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/dports/emulators/mess/mame-mame0226/3rdparty/asmjit/src/asmjit/x86/ |
H A D | x86operand.h | 708 static constexpr DReg dr0 = DReg(0); 709 static constexpr DReg dr1 = DReg(1); 710 static constexpr DReg dr2 = DReg(2); 711 static constexpr DReg dr3 = DReg(3); 712 static constexpr DReg dr4 = DReg(4); 713 static constexpr DReg dr5 = DReg(5); 714 static constexpr DReg dr6 = DReg(6); 715 static constexpr DReg dr7 = DReg(7); 716 static constexpr DReg dr8 = DReg(8); 717 static constexpr DReg dr9 = DReg(9); [all …]
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/dports/emulators/mame/mame-mame0226/3rdparty/asmjit/src/asmjit/x86/ |
H A D | x86operand.h | 708 static constexpr DReg dr0 = DReg(0); 709 static constexpr DReg dr1 = DReg(1); 710 static constexpr DReg dr2 = DReg(2); 711 static constexpr DReg dr3 = DReg(3); 712 static constexpr DReg dr4 = DReg(4); 713 static constexpr DReg dr5 = DReg(5); 714 static constexpr DReg dr6 = DReg(6); 715 static constexpr DReg dr7 = DReg(7); 716 static constexpr DReg dr8 = DReg(8); 717 static constexpr DReg dr9 = DReg(9); [all …]
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/dports/lang/erlang-wx/otp-OTP-24.1.7/erts/emulator/asmjit/x86/ |
H A D | x86operand.h | 763 static constexpr DReg dr0 = DReg(0); 764 static constexpr DReg dr1 = DReg(1); 765 static constexpr DReg dr2 = DReg(2); 766 static constexpr DReg dr3 = DReg(3); 767 static constexpr DReg dr4 = DReg(4); 768 static constexpr DReg dr5 = DReg(5); 769 static constexpr DReg dr6 = DReg(6); 770 static constexpr DReg dr7 = DReg(7); 771 static constexpr DReg dr8 = DReg(8); 772 static constexpr DReg dr9 = DReg(9); [all …]
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/dports/lang/erlang/otp-OTP-24.1.7/erts/emulator/asmjit/x86/ |
H A D | x86operand.h | 763 static constexpr DReg dr0 = DReg(0); 764 static constexpr DReg dr1 = DReg(1); 765 static constexpr DReg dr2 = DReg(2); 766 static constexpr DReg dr3 = DReg(3); 767 static constexpr DReg dr4 = DReg(4); 768 static constexpr DReg dr5 = DReg(5); 769 static constexpr DReg dr6 = DReg(6); 770 static constexpr DReg dr7 = DReg(7); 771 static constexpr DReg dr8 = DReg(8); 772 static constexpr DReg dr9 = DReg(9); [all …]
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/dports/lang/erlang-java/otp-OTP-24.1.7/erts/emulator/asmjit/x86/ |
H A D | x86operand.h | 763 static constexpr DReg dr0 = DReg(0); 764 static constexpr DReg dr1 = DReg(1); 765 static constexpr DReg dr2 = DReg(2); 766 static constexpr DReg dr3 = DReg(3); 767 static constexpr DReg dr4 = DReg(4); 768 static constexpr DReg dr5 = DReg(5); 769 static constexpr DReg dr6 = DReg(6); 770 static constexpr DReg dr7 = DReg(7); 771 static constexpr DReg dr8 = DReg(8); 772 static constexpr DReg dr9 = DReg(9); [all …]
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/dports/misc/mxnet/incubator-mxnet-1.9.0/3rdparty/mkldnn/src/cpu/aarch64/xbyak_aarch64/src/ |
H A D | xbyak_aarch64_mnemonic.h | 1439 void CodeGenerator::cmgt(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 6, vd,… in cmgt() 1440 void CodeGenerator::cmge(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 7, vd,… in cmge() 1441 void CodeGenerator::sshl(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 8, vd,… in sshl() 1451 void CodeGenerator::add(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 16, vd,… in add() 1463 void CodeGenerator::cmhi(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(1, 6, vd,… in cmhi() 1464 void CodeGenerator::cmhs(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(1, 7, vd,… in cmhs() 1465 void CodeGenerator::ushl(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(1, 8, vd,… in ushl() 3228 void CodeGenerator::fmadd(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va) { FpDataP… 3229 void CodeGenerator::fmsub(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va) { FpDataP… 3230 void CodeGenerator::fnmadd(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va) { FpData… [all …]
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/dports/math/onednn/oneDNN-2.5.1/src/cpu/aarch64/xbyak_aarch64/src/ |
H A D | xbyak_aarch64_mnemonic.h | 1439 void CodeGenerator::cmgt(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 6, vd,… in cmgt() 1440 void CodeGenerator::cmge(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 7, vd,… in cmge() 1441 void CodeGenerator::sshl(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 8, vd,… in sshl() 1451 void CodeGenerator::add(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 16, vd,… in add() 1463 void CodeGenerator::cmhi(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(1, 6, vd,… in cmhi() 1464 void CodeGenerator::cmhs(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(1, 7, vd,… in cmhs() 1465 void CodeGenerator::ushl(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(1, 8, vd,… in ushl() 3228 void CodeGenerator::fmadd(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va) { FpDataP… 3229 void CodeGenerator::fmsub(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va) { FpDataP… 3230 void CodeGenerator::fnmadd(const DReg &vd, const DReg &vn, const DReg &vm, const DReg &va) { FpData… [all …]
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/dports/devel/asmjit/asmjit-911a9a50a2cbc9802c4d44e94b8b99e1d9285cf3/src/asmjit/x86/ |
H A D | x86operand.h | 39 class DReg; variable 369 class DReg : public Reg { ASMJIT_DEFINE_FINAL_REG(DReg, Reg, RegTraits<kTypeDReg>) }; 597 static constexpr DReg dr(uint32_t rId) noexcept { return DReg(rId); } in dr() 818 static constexpr DReg dr0(0); 819 static constexpr DReg dr1(1); 820 static constexpr DReg dr2(2); 821 static constexpr DReg dr3(3); 822 static constexpr DReg dr4(4); 823 static constexpr DReg dr5(5); 824 static constexpr DReg dr6(6); [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 73 const DebugLoc &DL, unsigned DReg, 87 const DebugLoc &DL, unsigned DReg, 145 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR() local 147 if (DReg != ARM::NoRegister) return ARM::ssub_1; in getDPRLaneFromSPR() 435 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg() argument 442 .addReg(DReg, 0, Lane); in createExtractSubreg() 480 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg() argument 486 .addReg(DReg) in createInsertSubreg()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 74 const DebugLoc &DL, unsigned DReg, 88 const DebugLoc &DL, unsigned DReg, 146 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR() local 148 if (DReg != ARM::NoRegister) return ARM::ssub_1; in getDPRLaneFromSPR() 436 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg() argument 443 .addReg(DReg, 0, Lane); in createExtractSubreg() 481 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg() argument 487 .addReg(DReg) in createInsertSubreg()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 74 const DebugLoc &DL, unsigned DReg, 88 const DebugLoc &DL, unsigned DReg, 146 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, 148 if (DReg != ARM::NoRegister) return ARM::ssub_1; 436 const DebugLoc &DL, unsigned DReg, unsigned Lane, 443 .addReg(DReg, 0, Lane); 481 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { 487 .addReg(DReg)
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 73 const DebugLoc &DL, unsigned DReg, 87 const DebugLoc &DL, unsigned DReg, 145 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR() local 147 if (DReg != ARM::NoRegister) return ARM::ssub_1; in getDPRLaneFromSPR() 434 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg() argument 441 .addReg(DReg, 0, Lane); in createExtractSubreg() 479 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg() argument 485 .addReg(DReg) in createInsertSubreg()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 73 const DebugLoc &DL, unsigned DReg, 87 const DebugLoc &DL, unsigned DReg, 145 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR() local 147 if (DReg != ARM::NoRegister) return ARM::ssub_1; in getDPRLaneFromSPR() 434 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg() argument 441 .addReg(DReg, 0, Lane); in createExtractSubreg() 479 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg() argument 485 .addReg(DReg) in createInsertSubreg()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 73 const DebugLoc &DL, unsigned DReg, 87 const DebugLoc &DL, unsigned DReg, 145 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR() local 147 if (DReg != ARM::NoRegister) return ARM::ssub_1; in getDPRLaneFromSPR() 434 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg() argument 441 .addReg(DReg, 0, Lane); in createExtractSubreg() 479 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg() argument 485 .addReg(DReg) in createInsertSubreg()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 73 const DebugLoc &DL, unsigned DReg, 87 const DebugLoc &DL, unsigned DReg, 145 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR() local 147 if (DReg != ARM::NoRegister) return ARM::ssub_1; in getDPRLaneFromSPR() 433 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg() argument 440 .addReg(DReg, 0, Lane); in createExtractSubreg() 478 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg() argument 484 .addReg(DReg) in createInsertSubreg()
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