| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 966 unsigned DivOpcode, RemOpcode, DivremOpcode; in matchCombineDivRem() local
968 DivOpcode = TargetOpcode::G_SDIV; in matchCombineDivRem()
972 DivOpcode = TargetOpcode::G_UDIV; in matchCombineDivRem()
995 (!IsDiv && UseMI.getOpcode() == DivOpcode)) && in matchCombineDivRem()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 966 unsigned DivOpcode, RemOpcode, DivremOpcode; in matchCombineDivRem() local
968 DivOpcode = TargetOpcode::G_SDIV; in matchCombineDivRem()
972 DivOpcode = TargetOpcode::G_UDIV; in matchCombineDivRem()
995 (!IsDiv && UseMI.getOpcode() == DivOpcode)) && in matchCombineDivRem()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 966 unsigned DivOpcode, RemOpcode, DivremOpcode; in matchCombineDivRem() local
968 DivOpcode = TargetOpcode::G_SDIV; in matchCombineDivRem()
972 DivOpcode = TargetOpcode::G_UDIV; in matchCombineDivRem()
995 (!IsDiv && UseMI.getOpcode() == DivOpcode)) && in matchCombineDivRem()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 966 unsigned DivOpcode, RemOpcode, DivremOpcode; in matchCombineDivRem() local
968 DivOpcode = TargetOpcode::G_SDIV; in matchCombineDivRem()
972 DivOpcode = TargetOpcode::G_UDIV; in matchCombineDivRem()
995 (!IsDiv && UseMI.getOpcode() == DivOpcode)) && in matchCombineDivRem()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 966 unsigned DivOpcode, RemOpcode, DivremOpcode;
968 DivOpcode = TargetOpcode::G_SDIV;
972 DivOpcode = TargetOpcode::G_UDIV;
995 (!IsDiv && UseMI.getOpcode() == DivOpcode)) &&
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1067 unsigned DivOpcode, RemOpcode, DivremOpcode; in matchCombineDivRem() local
1069 DivOpcode = TargetOpcode::G_SDIV; in matchCombineDivRem()
1073 DivOpcode = TargetOpcode::G_UDIV; in matchCombineDivRem()
1096 (!IsDiv && UseMI.getOpcode() == DivOpcode)) && in matchCombineDivRem()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 14131 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV;
14134 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor);
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 13968 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV;
13971 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor);
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 14737 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
14740 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 16253 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
16256 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 16253 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
16256 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 16253 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
16256 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 3522 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in visitREM() local
3523 if (SDNode *DivNode = DAG.getNodeIfExists(DivOpcode, N->getVTList(), in visitREM()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 18027 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
18030 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 17666 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
17669 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4050 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in visitREM() local
4051 if (SDNode *DivNode = DAG.getNodeIfExists(DivOpcode, N->getVTList(), in visitREM()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 18081 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
18084 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 17669 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
17672 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4043 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in visitREM() local
4044 if (SDNode *DivNode = DAG.getNodeIfExists(DivOpcode, N->getVTList(), in visitREM()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4050 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in visitREM() local
4051 if (SDNode *DivNode = DAG.getNodeIfExists(DivOpcode, N->getVTList(), in visitREM()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 18081 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
18084 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4059 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in visitREM() local
4060 if (SDNode *DivNode = DAG.getNodeIfExists(DivOpcode, N->getVTList(), in visitREM()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4301 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in visitREM() local
4302 if (SDNode *DivNode = DAG.getNodeIfExists(DivOpcode, N->getVTList(), in visitREM()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4229 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in visitREM() local
4230 if (SDNode *DivNode = DAG.getNodeIfExists(DivOpcode, N->getVTList(), in visitREM()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 19457 unsigned DivOpcode = isSigned ? ISD::SDIV : ISD::UDIV; in LowerDivRem() local
19460 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
|