/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
H A D | BF561_def.h | 160 #define EBIU_SDBCTL 0xFFC00A14 macro
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H A D | BF561_cdef.h | 454 #define pEBIU_SDBCTL ((uint32_t volatile *)EBIU_SDBCTL) 455 #define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL) 456 #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val)
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
H A D | BF561_def.h | 160 #define EBIU_SDBCTL 0xFFC00A14 macro
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H A D | BF561_cdef.h | 454 #define pEBIU_SDBCTL ((uint32_t volatile *)EBIU_SDBCTL) 455 #define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL) 456 #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val)
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
H A D | BF561_def.h | 160 #define EBIU_SDBCTL 0xFFC00A14 macro
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H A D | BF561_cdef.h | 454 #define pEBIU_SDBCTL ((uint32_t volatile *)EBIU_SDBCTL) 455 #define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL) 456 #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val)
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
H A D | BF561_def.h | 160 #define EBIU_SDBCTL 0xFFC00A14 macro
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H A D | BF561_cdef.h | 454 #define pEBIU_SDBCTL ((uint32_t volatile *)EBIU_SDBCTL) 455 #define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL) 456 #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val)
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
H A D | BF561_def.h | 160 #define EBIU_SDBCTL 0xFFC00A14 macro
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H A D | BF561_cdef.h | 454 #define pEBIU_SDBCTL ((uint32_t volatile *)EBIU_SDBCTL) 455 #define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL) 456 #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val)
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
H A D | BF561_def.h | 160 #define EBIU_SDBCTL 0xFFC00A14 macro
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H A D | BF561_cdef.h | 454 #define pEBIU_SDBCTL ((uint32_t volatile *)EBIU_SDBCTL) 455 #define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL) 456 #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val)
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
H A D | BF561_def.h | 160 #define EBIU_SDBCTL 0xFFC00A14 macro
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H A D | BF561_cdef.h | 454 #define pEBIU_SDBCTL ((uint32_t volatile *)EBIU_SDBCTL) 455 #define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL) 456 #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val)
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf533/ |
H A D | BF531_def.h | 432 #define EBIU_SDBCTL 0xFFC00A14 macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 152 #define EBIU_SDBCTL 0xFFC00A14 /* SDRAM Bank Control Register */ macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 152 #define EBIU_SDBCTL 0xFFC00A14 /* SDRAM Bank Control Register */ macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 152 #define EBIU_SDBCTL 0xFFC00A14 /* SDRAM Bank Control Register */ macro
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 152 #define EBIU_SDBCTL 0xFFC00A14 /* SDRAM Bank Control Register */ macro
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 152 #define EBIU_SDBCTL 0xFFC00A14 /* SDRAM Bank Control Register */ macro
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 152 #define EBIU_SDBCTL 0xFFC00A14 /* SDRAM Bank Control Register */ macro
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf527/ |
H A D | BF522_def.h | 162 #define EBIU_SDBCTL 0xFFC00A14 /* SDRAM Bank Control Register */ macro
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | ADSP-EDN-BF52x-extended_def.h | 152 #define EBIU_SDBCTL 0xFFC00A14 /* SDRAM Bank Control Register */ macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-extended_def.h | 537 #define EBIU_SDBCTL 0xFFC00A14 macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-extended_def.h | 537 #define EBIU_SDBCTL 0xFFC00A14 macro
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