/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1105 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1106 #define FIRST_FP_RET_REG FIRST_FP_REG 1708 : ((int) (REGNO) >= FIRST_FP_REG \ 1710 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1711 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1066 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1067 #define FIRST_FP_RET_REG FIRST_FP_REG 1669 : ((int) (REGNO) >= FIRST_FP_REG \ 1671 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1672 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gcc9/gcc-9.4.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1105 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1106 #define FIRST_FP_RET_REG FIRST_FP_REG 1708 : ((int) (REGNO) >= FIRST_FP_REG \ 1710 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1711 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/sh/ |
H A D | sh.h | 606 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 637 #define FIRST_FP_REG DR0_REG macro 638 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 661 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1103 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1104 #define FIRST_FP_RET_REG FIRST_FP_REG 1706 : ((int) (REGNO) >= FIRST_FP_REG \ 1708 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1709 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1066 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1067 #define FIRST_FP_RET_REG FIRST_FP_REG 1669 : ((int) (REGNO) >= FIRST_FP_REG \ 1671 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1672 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1105 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1106 #define FIRST_FP_RET_REG FIRST_FP_REG 1708 : ((int) (REGNO) >= FIRST_FP_REG \ 1710 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1711 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1066 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1067 #define FIRST_FP_RET_REG FIRST_FP_REG 1669 : ((int) (REGNO) >= FIRST_FP_REG \ 1671 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1672 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1105 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1106 #define FIRST_FP_RET_REG FIRST_FP_REG 1708 : ((int) (REGNO) >= FIRST_FP_REG \ 1710 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1711 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1105 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1106 #define FIRST_FP_RET_REG FIRST_FP_REG 1708 : ((int) (REGNO) >= FIRST_FP_REG \ 1710 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1711 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1066 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1067 #define FIRST_FP_RET_REG FIRST_FP_REG 1669 : ((int) (REGNO) >= FIRST_FP_REG \ 1671 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1672 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/sh/ |
H A D | sh.h | 606 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 637 #define FIRST_FP_REG DR0_REG macro 638 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 661 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1103 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1104 #define FIRST_FP_RET_REG FIRST_FP_REG 1706 : ((int) (REGNO) >= FIRST_FP_REG \ 1708 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1709 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gcc10/gcc-10.3.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1066 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1067 #define FIRST_FP_RET_REG FIRST_FP_REG 1669 : ((int) (REGNO) >= FIRST_FP_REG \ 1671 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1672 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1105 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1106 #define FIRST_FP_RET_REG FIRST_FP_REG 1708 : ((int) (REGNO) >= FIRST_FP_REG \ 1710 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1711 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gcc8/gcc-8.5.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1105 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1106 #define FIRST_FP_RET_REG FIRST_FP_REG 1708 : ((int) (REGNO) >= FIRST_FP_REG \ 1710 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1711 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gcc11/gcc-11.2.0/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1066 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1067 #define FIRST_FP_RET_REG FIRST_FP_REG 1669 : ((int) (REGNO) >= FIRST_FP_REG \ 1671 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1672 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/sh/ |
H A D | sh.h | 608 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 639 #define FIRST_FP_REG DR0_REG macro 640 #define LAST_FP_REG (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)) 663 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1066 #define FIRST_FP_PARM_REG (FIRST_FP_REG + 4) 1067 #define FIRST_FP_RET_REG FIRST_FP_REG 1669 : ((int) (REGNO) >= FIRST_FP_REG \ 1671 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \ 1672 ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
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/dports/lang/gnat_util/gcc-6-20180516/gcc/config/sh/ |
H A D | sh.h | 653 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 684 #define FIRST_FP_REG DR0_REG macro 685 #define LAST_FP_REG (FIRST_FP_REG + \ 711 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1208 && TEST_HARD_REG_BIT (reg_class_contents[CLASS], FIRST_FP_REG) \ 1235 #define FIRST_FP_PARM_REG (FIRST_FP_REG + (TARGET_SH5 ? 0 : 4)) 1236 #define FIRST_FP_RET_REG FIRST_FP_REG 2069 : ((int) (REGNO) >= FIRST_FP_REG \ 2071 <= (FIRST_FP_REG + \ 2073 ? ((unsigned) (REGNO) - FIRST_FP_REG \
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/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/sh/ |
H A D | sh.h | 653 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 684 #define FIRST_FP_REG DR0_REG macro 685 #define LAST_FP_REG (FIRST_FP_REG + \ 711 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1208 && TEST_HARD_REG_BIT (reg_class_contents[CLASS], FIRST_FP_REG) \ 1235 #define FIRST_FP_PARM_REG (FIRST_FP_REG + (TARGET_SH5 ? 0 : 4)) 1236 #define FIRST_FP_RET_REG FIRST_FP_REG 2069 : ((int) (REGNO) >= FIRST_FP_REG \ 2071 <= (FIRST_FP_REG + \ 2073 ? ((unsigned) (REGNO) - FIRST_FP_REG \
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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/gcc-4.1-20060728/gcc/config/sh/ |
H A D | sh.h | 123 regno_reg_class[FIRST_FP_REG] = FP_REGS; \ 136 for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0); \ 942 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 973 #define FIRST_FP_REG DR0_REG macro 974 #define LAST_FP_REG (FIRST_FP_REG + \ 1181 && (((REGNO) - FIRST_FP_REG) & 1) == 0) \ 1184 && (((REGNO) - FIRST_FP_REG) & 3) == 0)) \ 1720 #define FIRST_FP_RET_REG FIRST_FP_REG 3030 : ((int) (REGNO) >= FIRST_FP_REG \ 3032 <= (FIRST_FP_REG + \ [all …]
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/gcc/config/sh/ |
H A D | sh.h | 101 regno_reg_class[FIRST_FP_REG] = FP_REGS; \ 111 for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0); \ 785 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 816 #define FIRST_FP_REG DR0_REG macro 817 #define LAST_FP_REG (FIRST_FP_REG + \ 1015 && (((REGNO) - FIRST_FP_REG) & 1) == 0)) \ 1549 #define FIRST_FP_PARM_REG (FIRST_FP_REG + (TARGET_SH5 ? 0 : 4)) 1550 #define FIRST_FP_RET_REG FIRST_FP_REG 2887 : ((int) (REGNO) >= FIRST_FP_REG \ 2889 <= (FIRST_FP_REG + \ [all …]
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/gcc/config/sh/ |
H A D | sh.h | 101 regno_reg_class[FIRST_FP_REG] = FP_REGS; \ 111 for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0); \ 785 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 816 #define FIRST_FP_REG DR0_REG macro 817 #define LAST_FP_REG (FIRST_FP_REG + \ 1015 && (((REGNO) - FIRST_FP_REG) & 1) == 0)) \ 1549 #define FIRST_FP_PARM_REG (FIRST_FP_REG + (TARGET_SH5 ? 0 : 4)) 1550 #define FIRST_FP_RET_REG FIRST_FP_REG 2887 : ((int) (REGNO) >= FIRST_FP_REG \ 2889 <= (FIRST_FP_REG + \ [all …]
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/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/sh/ |
H A D | sh.h | 631 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 662 #define FIRST_FP_REG DR0_REG macro 663 #define LAST_FP_REG (FIRST_FP_REG + \ 689 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1144 && TEST_HARD_REG_BIT (reg_class_contents[CLASS], FIRST_FP_REG) \ 1171 #define FIRST_FP_PARM_REG (FIRST_FP_REG + (TARGET_SH5 ? 0 : 4)) 1172 #define FIRST_FP_RET_REG FIRST_FP_REG 2044 : ((int) (REGNO) >= FIRST_FP_REG \ 2046 <= (FIRST_FP_REG + \ 2048 ? ((unsigned) (REGNO) - FIRST_FP_REG \
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/dports/lang/gcc48/gcc-4.8.5/gcc/config/sh/ |
H A D | sh.h | 626 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 657 #define FIRST_FP_REG DR0_REG macro 658 #define LAST_FP_REG (FIRST_FP_REG + \ 684 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1143 && TEST_HARD_REG_BIT (reg_class_contents[CLASS], FIRST_FP_REG) \ 1170 #define FIRST_FP_PARM_REG (FIRST_FP_REG + (TARGET_SH5 ? 0 : 4)) 1171 #define FIRST_FP_RET_REG FIRST_FP_REG 2043 : ((int) (REGNO) >= FIRST_FP_REG \ 2045 <= (FIRST_FP_REG + \ 2047 ? ((unsigned) (REGNO) - FIRST_FP_REG \
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H A D | sh.c | 6978 if (FP_REGISTER_P (rn) && (rn - FIRST_FP_REG) & 1) in push() 7004 if (FP_REGISTER_P (rn) && (rn - FIRST_FP_REG) & 1) in pop() 7043 if (i == FIRST_FP_REG && interrupt_handler && TARGET_FMOVD in push_regs() 7196 for (count = 0, reg = FIRST_FP_REG; reg <= LAST_FP_REG; reg += 2) in calc_live_regs() 8127 if (j == FIRST_FP_REG && fpscr_deferred) in sh_expand_epilogue() 12084 if ((FP_REGISTER_P (regno) && (regno - FIRST_FP_REG) % 4 == 0) in sh_hard_regno_mode_ok() 12095 if (FP_REGISTER_P (regno) && (regno - FIRST_FP_REG) % 16 == 0) in sh_hard_regno_mode_ok() 12114 && ((regno - FIRST_FP_REG) & 1) == 0) in sh_hard_regno_mode_ok() 12116 && ((regno - FIRST_FP_REG) & 3) == 0)) in sh_hard_regno_mode_ok() 13208 regno_reg_class[FIRST_FP_REG] = FP_REGS; in sh_conditional_register_usage() [all …]
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/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/sh/ |
H A D | sh.h | 626 ((index < 32) ? (FIRST_FP_REG + (index) * 2) \ 657 #define FIRST_FP_REG DR0_REG macro 658 #define LAST_FP_REG (FIRST_FP_REG + \ 684 ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG) 1143 && TEST_HARD_REG_BIT (reg_class_contents[CLASS], FIRST_FP_REG) \ 1170 #define FIRST_FP_PARM_REG (FIRST_FP_REG + (TARGET_SH5 ? 0 : 4)) 1171 #define FIRST_FP_RET_REG FIRST_FP_REG 2043 : ((int) (REGNO) >= FIRST_FP_REG \ 2045 <= (FIRST_FP_REG + \ 2047 ? ((unsigned) (REGNO) - FIRST_FP_REG \
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