/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/bridge/ |
H A D | tc358764.c | 58 #define VP_HTIM1_HBP(v) FLD_VAL(v, 24, 16) 59 #define VP_HTIM1_HSYNC(v) FLD_VAL(v, 8, 0) 61 #define VP_HTIM2_HFP(v) FLD_VAL(v, 24, 16) 62 #define VP_HTIM2_HACT(v) FLD_VAL(v, 10, 0) 64 #define VP_VTIM1_VBP(v) FLD_VAL(v, 23, 16) 65 #define VP_VTIM1_VSYNC(v) FLD_VAL(v, 7, 0) 67 #define VP_VTIM2_VFP(v) FLD_VAL(v, 23, 16) 68 #define VP_VTIM2_VACT(v) FLD_VAL(v, 10, 0) 79 #define LV_MX(b0, b1, b2, b3) (FLD_VAL(b0, 4, 0) | FLD_VAL(b1, 12, 8) | \ 80 FLD_VAL(b2, 20, 16) | FLD_VAL(b3, 28, 24)) [all …]
|
H A D | tc358775.c | 31 #define FLD_VAL(val, start, end) FIELD_PREP(GENMASK(start, end), val) macro 125 #define LV_MX(b0, b1, b2, b3) (FLD_VAL(b0, 4, 0) | FLD_VAL(b1, 12, 8) | \ 126 FLD_VAL(b2, 20, 16) | FLD_VAL(b3, 28, 24)) 162 #define LV_PHY0_RST(v) FLD_VAL(v, 22, 22) /* PHY reset */ 163 #define LV_PHY0_IS(v) FLD_VAL(v, 15, 14) 164 #define LV_PHY0_ND(v) FLD_VAL(v, 4, 0) /* Frequency range select */ 165 #define LV_PHY0_PRBS_ON(v) FLD_VAL(v, 20, 16) /* Clock/Data Flag pins */
|
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/bridge/ |
H A D | tc358764.c | 58 #define VP_HTIM1_HBP(v) FLD_VAL(v, 24, 16) 59 #define VP_HTIM1_HSYNC(v) FLD_VAL(v, 8, 0) 61 #define VP_HTIM2_HFP(v) FLD_VAL(v, 24, 16) 62 #define VP_HTIM2_HACT(v) FLD_VAL(v, 10, 0) 64 #define VP_VTIM1_VBP(v) FLD_VAL(v, 23, 16) 65 #define VP_VTIM1_VSYNC(v) FLD_VAL(v, 7, 0) 67 #define VP_VTIM2_VFP(v) FLD_VAL(v, 23, 16) 68 #define VP_VTIM2_VACT(v) FLD_VAL(v, 10, 0) 79 #define LV_MX(b0, b1, b2, b3) (FLD_VAL(b0, 4, 0) | FLD_VAL(b1, 12, 8) | \ 80 FLD_VAL(b2, 20, 16) | FLD_VAL(b3, 28, 24)) [all …]
|
H A D | tc358775.c | 31 #define FLD_VAL(val, start, end) FIELD_PREP(GENMASK(start, end), val) macro 125 #define LV_MX(b0, b1, b2, b3) (FLD_VAL(b0, 4, 0) | FLD_VAL(b1, 12, 8) | \ 126 FLD_VAL(b2, 20, 16) | FLD_VAL(b3, 28, 24)) 162 #define LV_PHY0_RST(v) FLD_VAL(v, 22, 22) /* PHY reset */ 163 #define LV_PHY0_IS(v) FLD_VAL(v, 15, 14) 164 #define LV_PHY0_ND(v) FLD_VAL(v, 4, 0) /* Frequency range select */ 165 #define LV_PHY0_PRBS_ON(v) FLD_VAL(v, 20, 16) /* Clock/Data Flag pins */
|
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/bridge/ |
H A D | tc358764.c | 58 #define VP_HTIM1_HBP(v) FLD_VAL(v, 24, 16) 59 #define VP_HTIM1_HSYNC(v) FLD_VAL(v, 8, 0) 61 #define VP_HTIM2_HFP(v) FLD_VAL(v, 24, 16) 62 #define VP_HTIM2_HACT(v) FLD_VAL(v, 10, 0) 64 #define VP_VTIM1_VBP(v) FLD_VAL(v, 23, 16) 65 #define VP_VTIM1_VSYNC(v) FLD_VAL(v, 7, 0) 67 #define VP_VTIM2_VFP(v) FLD_VAL(v, 23, 16) 68 #define VP_VTIM2_VACT(v) FLD_VAL(v, 10, 0) 79 #define LV_MX(b0, b1, b2, b3) (FLD_VAL(b0, 4, 0) | FLD_VAL(b1, 12, 8) | \ 80 FLD_VAL(b2, 20, 16) | FLD_VAL(b3, 28, 24)) [all …]
|
H A D | tc358775.c | 31 #define FLD_VAL(val, start, end) FIELD_PREP(GENMASK(start, end), val) macro 125 #define LV_MX(b0, b1, b2, b3) (FLD_VAL(b0, 4, 0) | FLD_VAL(b1, 12, 8) | \ 126 FLD_VAL(b2, 20, 16) | FLD_VAL(b3, 28, 24)) 162 #define LV_PHY0_RST(v) FLD_VAL(v, 22, 22) /* PHY reset */ 163 #define LV_PHY0_IS(v) FLD_VAL(v, 15, 14) 164 #define LV_PHY0_ND(v) FLD_VAL(v, 4, 0) /* Frequency range select */ 165 #define LV_PHY0_PRBS_ON(v) FLD_VAL(v, 20, 16) /* Clock/Data Flag pins */
|
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | hdmi_wp.c | 139 l |= FLD_VAL(video_fmt->y_res, 31, 16); in hdmi_wp_video_config_format() 140 l |= FLD_VAL(video_fmt->x_res, 15, 0); in hdmi_wp_video_config_format() 170 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing() 171 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing() 172 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing() 175 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing() 176 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing() 177 timing_v |= FLD_VAL(timings->vsw, 7, 0); in hdmi_wp_video_config_timing()
|
H A D | dispc.c | 666 #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) in dispc_ovl_write_color_conv_coef() 727 val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); in dispc_ovl_set_pos() 735 u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_input_size() 750 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_output_size() 1064 coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) | in dispc_mgr_set_cpr_coef() 1066 coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | in dispc_mgr_set_cpr_coef() 1309 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_ovl_set_mflag_threshold() 1387 val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); in dispc_ovl_set_fir() 1425 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_0() 1434 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_1() [all …]
|
H A D | dss.h | 60 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro 63 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
|
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | hdmi_wp.c | 139 l |= FLD_VAL(video_fmt->y_res, 31, 16); in hdmi_wp_video_config_format() 140 l |= FLD_VAL(video_fmt->x_res, 15, 0); in hdmi_wp_video_config_format() 170 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing() 171 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing() 172 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing() 175 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing() 176 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing() 177 timing_v |= FLD_VAL(timings->vsw, 7, 0); in hdmi_wp_video_config_timing()
|
H A D | dispc.c | 666 #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) in dispc_ovl_write_color_conv_coef() 727 val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); in dispc_ovl_set_pos() 735 u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_input_size() 750 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_output_size() 1064 coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) | in dispc_mgr_set_cpr_coef() 1066 coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | in dispc_mgr_set_cpr_coef() 1309 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_ovl_set_mflag_threshold() 1387 val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); in dispc_ovl_set_fir() 1425 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_0() 1434 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_1() [all …]
|
H A D | dss.h | 60 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro 63 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
|
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | hdmi_wp.c | 139 l |= FLD_VAL(video_fmt->y_res, 31, 16); in hdmi_wp_video_config_format() 140 l |= FLD_VAL(video_fmt->x_res, 15, 0); in hdmi_wp_video_config_format() 170 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing() 171 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing() 172 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing() 175 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing() 176 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing() 177 timing_v |= FLD_VAL(timings->vsw, 7, 0); in hdmi_wp_video_config_timing()
|
H A D | dispc.c | 666 #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) in dispc_ovl_write_color_conv_coef() 727 val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); in dispc_ovl_set_pos() 735 u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_input_size() 750 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_output_size() 1064 coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) | in dispc_mgr_set_cpr_coef() 1066 coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | in dispc_mgr_set_cpr_coef() 1309 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_ovl_set_mflag_threshold() 1387 val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); in dispc_ovl_set_fir() 1425 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_0() 1434 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_1() [all …]
|
H A D | dss.h | 60 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro 63 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
|
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi_wp.c | 138 l |= FLD_VAL(video_fmt->y_res, 31, 16); in hdmi_wp_video_config_format() 139 l |= FLD_VAL(video_fmt->x_res, 15, 0); in hdmi_wp_video_config_format() 181 timing_h |= FLD_VAL(vm->hback_porch, 31, 20); in hdmi_wp_video_config_timing() 182 timing_h |= FLD_VAL(vm->hfront_porch, 19, 8); in hdmi_wp_video_config_timing() 183 timing_h |= FLD_VAL(vm->hsync_len - hsync_len_offset, 7, 0); in hdmi_wp_video_config_timing() 186 timing_v |= FLD_VAL(vm->vback_porch, 31, 20); in hdmi_wp_video_config_timing() 187 timing_v |= FLD_VAL(vm->vfront_porch, 19, 8); in hdmi_wp_video_config_timing() 188 timing_v |= FLD_VAL(vm->vsync_len, 7, 0); in hdmi_wp_video_config_timing()
|
H A D | dispc.c | 865 #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) in dispc_ovl_write_color_conv_coef() 969 val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); in dispc_ovl_set_pos() 978 u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_input_size() 994 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_output_size() 1322 coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) | in dispc_mgr_set_cpr_coef() 1324 coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | in dispc_mgr_set_cpr_coef() 1580 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_ovl_set_mflag_threshold() 1659 val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); in dispc_ovl_set_fir() 1706 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_0() 1716 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_1() [all …]
|
H A D | dss.h | 65 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro 68 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
|
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi_wp.c | 138 l |= FLD_VAL(video_fmt->y_res, 31, 16); in hdmi_wp_video_config_format() 139 l |= FLD_VAL(video_fmt->x_res, 15, 0); in hdmi_wp_video_config_format() 181 timing_h |= FLD_VAL(vm->hback_porch, 31, 20); in hdmi_wp_video_config_timing() 182 timing_h |= FLD_VAL(vm->hfront_porch, 19, 8); in hdmi_wp_video_config_timing() 183 timing_h |= FLD_VAL(vm->hsync_len - hsync_len_offset, 7, 0); in hdmi_wp_video_config_timing() 186 timing_v |= FLD_VAL(vm->vback_porch, 31, 20); in hdmi_wp_video_config_timing() 187 timing_v |= FLD_VAL(vm->vfront_porch, 19, 8); in hdmi_wp_video_config_timing() 188 timing_v |= FLD_VAL(vm->vsync_len, 7, 0); in hdmi_wp_video_config_timing()
|
H A D | dispc.c | 865 #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) in dispc_ovl_write_color_conv_coef() 969 val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); in dispc_ovl_set_pos() 978 u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_input_size() 994 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_output_size() 1322 coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) | in dispc_mgr_set_cpr_coef() 1324 coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | in dispc_mgr_set_cpr_coef() 1580 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_ovl_set_mflag_threshold() 1659 val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); in dispc_ovl_set_fir() 1706 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_0() 1716 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_1() [all …]
|
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi_wp.c | 138 l |= FLD_VAL(video_fmt->y_res, 31, 16); in hdmi_wp_video_config_format() 139 l |= FLD_VAL(video_fmt->x_res, 15, 0); in hdmi_wp_video_config_format() 181 timing_h |= FLD_VAL(vm->hback_porch, 31, 20); in hdmi_wp_video_config_timing() 182 timing_h |= FLD_VAL(vm->hfront_porch, 19, 8); in hdmi_wp_video_config_timing() 183 timing_h |= FLD_VAL(vm->hsync_len - hsync_len_offset, 7, 0); in hdmi_wp_video_config_timing() 186 timing_v |= FLD_VAL(vm->vback_porch, 31, 20); in hdmi_wp_video_config_timing() 187 timing_v |= FLD_VAL(vm->vfront_porch, 19, 8); in hdmi_wp_video_config_timing() 188 timing_v |= FLD_VAL(vm->vsync_len, 7, 0); in hdmi_wp_video_config_timing()
|
H A D | dispc.c | 865 #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) in dispc_ovl_write_color_conv_coef() 969 val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); in dispc_ovl_set_pos() 978 u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_input_size() 994 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); in dispc_ovl_set_output_size() 1322 coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) | in dispc_mgr_set_cpr_coef() 1324 coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | in dispc_mgr_set_cpr_coef() 1580 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_ovl_set_mflag_threshold() 1659 val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); in dispc_ovl_set_fir() 1706 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_0() 1716 val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); in dispc_ovl_set_vid_accu2_1() [all …]
|
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/tidss/ |
H A D | tidss_dispc.c | 994 FLD_VAL(vfp, 19, 8) | in dispc_vp_enable() 995 FLD_VAL(vbp, 31, 20)); in dispc_vp_enable() 1020 FLD_VAL(rf, 16, 16) | in dispc_vp_enable() 1021 FLD_VAL(ieo, 15, 15) | in dispc_vp_enable() 1338 #define OVAL(x, y) (FLD_VAL(x, 15, 3) | FLD_VAL(y, 31, 19)) in dispc_csc_offset_regval() 1345 #define CVAL(x, y) (FLD_VAL(x, 10, 0) | FLD_VAL(y, 26, 16)) 1584 c12 = FLD_VAL(c1, 19, 10) | FLD_VAL(c2, 29, 20); in dispc_vid_write_fir_coefs() 2086 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_vid_set_mflag_threshold() 2093 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_vid_set_buf_threshold() 2407 #define CVAL(xR, xG, xB) (FLD_VAL(xR, 9, 0) | FLD_VAL(xG, 20, 11) | \ [all …]
|
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/tidss/ |
H A D | tidss_dispc.c | 994 FLD_VAL(vfp, 19, 8) | in dispc_vp_enable() 995 FLD_VAL(vbp, 31, 20)); in dispc_vp_enable() 1020 FLD_VAL(rf, 16, 16) | in dispc_vp_enable() 1021 FLD_VAL(ieo, 15, 15) | in dispc_vp_enable() 1338 #define OVAL(x, y) (FLD_VAL(x, 15, 3) | FLD_VAL(y, 31, 19)) in dispc_csc_offset_regval() 1345 #define CVAL(x, y) (FLD_VAL(x, 10, 0) | FLD_VAL(y, 26, 16)) 1584 c12 = FLD_VAL(c1, 19, 10) | FLD_VAL(c2, 29, 20); in dispc_vid_write_fir_coefs() 2086 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_vid_set_mflag_threshold() 2093 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_vid_set_buf_threshold() 2407 #define CVAL(xR, xG, xB) (FLD_VAL(xR, 9, 0) | FLD_VAL(xG, 20, 11) | \ [all …]
|
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/tidss/ |
H A D | tidss_dispc.c | 994 FLD_VAL(vfp, 19, 8) | in dispc_vp_enable() 995 FLD_VAL(vbp, 31, 20)); in dispc_vp_enable() 1020 FLD_VAL(rf, 16, 16) | in dispc_vp_enable() 1021 FLD_VAL(ieo, 15, 15) | in dispc_vp_enable() 1338 #define OVAL(x, y) (FLD_VAL(x, 15, 3) | FLD_VAL(y, 31, 19)) in dispc_csc_offset_regval() 1345 #define CVAL(x, y) (FLD_VAL(x, 10, 0) | FLD_VAL(y, 26, 16)) 1584 c12 = FLD_VAL(c1, 19, 10) | FLD_VAL(c2, 29, 20); in dispc_vid_write_fir_coefs() 2086 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_vid_set_mflag_threshold() 2093 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); in dispc_vid_set_buf_threshold() 2407 #define CVAL(xR, xG, xB) (FLD_VAL(xR, 9, 0) | FLD_VAL(xG, 20, 11) | \ [all …]
|