/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/ |
H A D | tic54x-opc.c | 261 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 269 B_BRANCH|FL_NR, REST}, 271 B_BRANCH|FL_DELAY|FL_NR, REST}, 280 B_BRANCH|FL_NR, REST}, 282 B_BRANCH|FL_DELAY|FL_NR, REST}, 285 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 308 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 392 B_RET|FL_NR, REST}, 394 B_RET|FL_DELAY|FL_NR, REST}, 396 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/ |
H A D | tic54x-opc.c | 263 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 271 B_BRANCH|FL_NR, REST}, 273 B_BRANCH|FL_DELAY|FL_NR, REST}, 282 B_BRANCH|FL_NR, REST}, 284 B_BRANCH|FL_DELAY|FL_NR, REST}, 287 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 310 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 394 B_RET|FL_NR, REST}, 396 B_RET|FL_DELAY|FL_NR, REST}, 398 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/ |
H A D | tic54x-opc.c | 263 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 271 B_BRANCH|FL_NR, REST}, 273 B_BRANCH|FL_DELAY|FL_NR, REST}, 282 B_BRANCH|FL_NR, REST}, 284 B_BRANCH|FL_DELAY|FL_NR, REST}, 287 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 310 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 394 B_RET|FL_NR, REST}, 396 B_RET|FL_DELAY|FL_NR, REST}, 398 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/ |
H A D | tic54x-opc.c | 263 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 271 B_BRANCH|FL_NR, REST}, 273 B_BRANCH|FL_DELAY|FL_NR, REST}, 282 B_BRANCH|FL_NR, REST}, 284 B_BRANCH|FL_DELAY|FL_NR, REST}, 287 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 310 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 394 B_RET|FL_NR, REST}, 396 B_RET|FL_DELAY|FL_NR, REST}, 398 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | tic54x-opc.c | 261 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 269 B_BRANCH|FL_NR, REST}, 271 B_BRANCH|FL_DELAY|FL_NR, REST}, 280 B_BRANCH|FL_NR, REST}, 282 B_BRANCH|FL_DELAY|FL_NR, REST}, 285 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 308 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 392 B_RET|FL_NR, REST}, 394 B_RET|FL_DELAY|FL_NR, REST}, 396 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/avr-gdb/gdb-7.3.1/opcodes/ |
H A D | tic54x-opc.c | 263 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 271 B_BRANCH|FL_NR, REST}, 273 B_BRANCH|FL_DELAY|FL_NR, REST}, 282 B_BRANCH|FL_NR, REST}, 284 B_BRANCH|FL_DELAY|FL_NR, REST}, 287 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 310 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 394 B_RET|FL_NR, REST}, 396 B_RET|FL_DELAY|FL_NR, REST}, 398 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/gdb/gdb-11.1/opcodes/ |
H A D | tic54x-opc.c | 263 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 271 B_BRANCH|FL_NR, REST}, 273 B_BRANCH|FL_DELAY|FL_NR, REST}, 282 B_BRANCH|FL_NR, REST}, 284 B_BRANCH|FL_DELAY|FL_NR, REST}, 287 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 310 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 394 B_RET|FL_NR, REST}, 396 B_RET|FL_DELAY|FL_NR, REST}, 398 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/gdb761/gdb-7.6.1/opcodes/ |
H A D | tic54x-opc.c | 263 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 271 B_BRANCH|FL_NR, REST}, 273 B_BRANCH|FL_DELAY|FL_NR, REST}, 282 B_BRANCH|FL_NR, REST}, 284 B_BRANCH|FL_DELAY|FL_NR, REST}, 287 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 310 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 394 B_RET|FL_NR, REST}, 396 B_RET|FL_DELAY|FL_NR, REST}, 398 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/gnulibiberty/binutils-2.37/opcodes/ |
H A D | tic54x-opc.c | 263 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 271 B_BRANCH|FL_NR, REST}, 273 B_BRANCH|FL_DELAY|FL_NR, REST}, 282 B_BRANCH|FL_NR, REST}, 284 B_BRANCH|FL_DELAY|FL_NR, REST}, 287 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 310 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 394 B_RET|FL_NR, REST}, 396 B_RET|FL_DELAY|FL_NR, REST}, 398 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | tic54x-opc.c | 261 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 269 B_BRANCH|FL_NR, REST}, 271 B_BRANCH|FL_DELAY|FL_NR, REST}, 280 B_BRANCH|FL_NR, REST}, 282 B_BRANCH|FL_DELAY|FL_NR, REST}, 285 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 308 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 392 B_RET|FL_NR, REST}, 394 B_RET|FL_DELAY|FL_NR, REST}, 396 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/djgpp-binutils/binutils-2.17/opcodes/ |
H A D | tic54x-opc.c | 261 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 269 B_BRANCH|FL_NR, REST}, 271 B_BRANCH|FL_DELAY|FL_NR, REST}, 280 B_BRANCH|FL_NR, REST}, 282 B_BRANCH|FL_DELAY|FL_NR, REST}, 285 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 308 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 392 B_RET|FL_NR, REST}, 394 B_RET|FL_DELAY|FL_NR, REST}, 396 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/binutils/binutils-2.37/opcodes/ |
H A D | tic54x-opc.c | 263 { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, REST}, 271 B_BRANCH|FL_NR, REST}, 273 B_BRANCH|FL_DELAY|FL_NR, REST}, 282 B_BRANCH|FL_NR, REST}, 284 B_BRANCH|FL_DELAY|FL_NR, REST}, 287 { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, REST}, 310 { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, REST}, 394 B_RET|FL_NR, REST}, 396 B_RET|FL_DELAY|FL_NR, REST}, 398 { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, REST}, [all …]
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/dports/devel/binutils/binutils-2.37/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/lang/gnatdroid-binutils-x86/binutils-2.27/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/devel/gnulibiberty/binutils-2.37/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/devel/avr-gdb/gdb-7.3.1/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/lang/gnatdroid-binutils/binutils-2.27/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/devel/gdb761/gdb-7.6.1/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/devel/gdb/gdb-11.1/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/opcode/ |
H A D | tic54x.h | 140 #define FL_NR 0x100 /* no repeat allowed */ macro
|