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Searched refs:FMT_HIGHPASS_RANDOM_ENABLE (Results 1 – 25 of 41) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_opp.h107 OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh),\
177 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh),\
214 OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh),\
250 type FMT_HIGHPASS_RANDOM_ENABLE; \
H A Ddce_opp.c212 FMT_HIGHPASS_RANDOM_ENABLE, 0, in set_spatial_dither()
277 FMT_HIGHPASS_RANDOM_ENABLE, params->flags.HIGHPASS_RANDOM, in set_spatial_dither()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_opp.h107 OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh),\
177 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh),\
214 OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh),\
250 type FMT_HIGHPASS_RANDOM_ENABLE; \
H A Ddce_opp.c212 FMT_HIGHPASS_RANDOM_ENABLE, 0, in set_spatial_dither()
277 FMT_HIGHPASS_RANDOM_ENABLE, params->flags.HIGHPASS_RANDOM, in set_spatial_dither()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_opp.h107 OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh),\
177 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh),\
214 OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh),\
250 type FMT_HIGHPASS_RANDOM_ENABLE; \
H A Ddce_opp.c212 FMT_HIGHPASS_RANDOM_ENABLE, 0, in set_spatial_dither()
277 FMT_HIGHPASS_RANDOM_ENABLE, params->flags.HIGHPASS_RANDOM, in set_spatial_dither()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_opp.h76 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh), \
110 type FMT_HIGHPASS_RANDOM_ENABLE; \
H A Ddcn10_opp.c71 FMT_HIGHPASS_RANDOM_ENABLE, 0, in opp1_set_spatial_dither()
133 FMT_HIGHPASS_RANDOM_ENABLE, params->flags.HIGHPASS_RANDOM, in opp1_set_spatial_dither()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_opp.h76 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh), \
110 type FMT_HIGHPASS_RANDOM_ENABLE; \
H A Ddcn10_opp.c71 FMT_HIGHPASS_RANDOM_ENABLE, 0, in opp1_set_spatial_dither()
133 FMT_HIGHPASS_RANDOM_ENABLE, params->flags.HIGHPASS_RANDOM, in opp1_set_spatial_dither()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_opp.h76 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, mask_sh), \
110 type FMT_HIGHPASS_RANDOM_ENABLE; \
H A Ddcn10_opp.c71 FMT_HIGHPASS_RANDOM_ENABLE, 0, in opp1_set_spatial_dither()
133 FMT_HIGHPASS_RANDOM_ENABLE, params->flags.HIGHPASS_RANDOM, in opp1_set_spatial_dither()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v10_0.c539 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v10_0_program_fmt()
551 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v10_0_program_fmt()
564 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v10_0_program_fmt()
H A Ddce_v11_0.c565 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v11_0_program_fmt()
577 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v11_0_program_fmt()
590 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v11_0_program_fmt()
H A Dsid.h2112 #define FMT_HIGHPASS_RANDOM_ENABLE (1 << 15) macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v10_0.c539 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v10_0_program_fmt()
551 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v10_0_program_fmt()
564 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v10_0_program_fmt()
H A Ddce_v11_0.c565 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v11_0_program_fmt()
577 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v11_0_program_fmt()
590 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v11_0_program_fmt()
H A Dsid.h2112 #define FMT_HIGHPASS_RANDOM_ENABLE (1 << 15) macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v10_0.c539 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v10_0_program_fmt()
551 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v10_0_program_fmt()
564 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v10_0_program_fmt()
H A Ddce_v11_0.c565 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v11_0_program_fmt()
577 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v11_0_program_fmt()
590 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_HIGHPASS_RANDOM_ENABLE, 1); in dce_v11_0_program_fmt()
H A Dsid.h2112 #define FMT_HIGHPASS_RANDOM_ENABLE (1 << 15) macro
/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dcikd.h955 # define FMT_HIGHPASS_RANDOM_ENABLE (1 << 15) macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dcikd.h996 # define FMT_HIGHPASS_RANDOM_ENABLE (1 << 15) macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dcikd.h996 # define FMT_HIGHPASS_RANDOM_ENABLE (1 << 15) macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dcikd.h996 # define FMT_HIGHPASS_RANDOM_ENABLE (1 << 15) macro

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