| /dports/audio/lsp-plugins-lv2/lsp-plugins-1.1.31/include/dsp/arch/arm/ |
| H A D | fpscr.h | 47 #define FPSCR_DN (1 << 25) /* Default NaN mode control */ macro
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| /dports/audio/tamgamp-lv2/tamgamp.lv2-590ced0a1da96ca481a1a719eebdb17f3af472e4/include/dsp/arch/arm/ |
| H A D | fpscr.h | 46 #define FPSCR_DN (1 << 25) /* Default NaN mode control */ macro
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| /dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/A64/ |
| H A D | a32_emit_a64.h | 37 bool FPSCR_DN() const override;
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| H A D | emit_a64.h | 51 virtual bool FPSCR_DN() const = 0;
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| /dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/A64/ |
| H A D | a32_emit_a64.h | 37 bool FPSCR_DN() const override;
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| H A D | emit_a64.h | 51 virtual bool FPSCR_DN() const = 0;
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| /dports/audio/tamgamp-lv2/tamgamp.lv2-590ced0a1da96ca481a1a719eebdb17f3af472e4/src/dsp/ |
| H A D | arm.cpp | 267 write_fpscr(fpscr | FPSCR_FZ | FPSCR_DN); in start()
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| /dports/emulators/qemu-utils/qemu-4.2.1/target/sh4/ |
| H A D | cpu.c | 68 env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ in superh_cpu_reset()
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| H A D | cpu.h | 53 #define FPSCR_DN (1 << 18) macro
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| /dports/emulators/qemu5/qemu-5.2.0/target/sh4/ |
| H A D | cpu.c | 68 env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ in superh_cpu_reset()
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| H A D | cpu.h | 53 #define FPSCR_DN (1 << 18) macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/sh4/ |
| H A D | cpu.c | 68 env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ in superh_cpu_reset()
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| H A D | cpu.h | 53 #define FPSCR_DN (1 << 18) macro
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| /dports/audio/lsp-plugins-lv2/lsp-plugins-1.1.31/src/dsp/ |
| H A D | arm.cpp | 271 write_fpscr(fpscr | FPSCR_FZ | FPSCR_DN); in start()
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| /dports/emulators/qemu42/qemu-4.2.1/target/sh4/ |
| H A D | cpu.c | 68 env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ in superh_cpu_reset()
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| H A D | cpu.h | 53 #define FPSCR_DN (1 << 18) macro
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/sh4/ |
| H A D | cpu.c | 68 env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ in superh_cpu_reset()
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| H A D | cpu.h | 53 #define FPSCR_DN (1 << 18) macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/sh4/ |
| H A D | cpu.c | 69 env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ in superh_cpu_reset()
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| H A D | cpu.h | 69 #define FPSCR_DN (1 << 18) macro
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/sh4/ |
| H A D | cpu.c | 86 env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ in superh_cpu_reset()
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| /dports/emulators/qemu/qemu-6.2.0/target/sh4/ |
| H A D | cpu.c | 86 env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ in superh_cpu_reset()
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| /dports/emulators/qemu60/qemu-6.0.0/target/sh4/ |
| H A D | cpu.c | 86 env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ in superh_cpu_reset()
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| /dports/devel/fossology-nomos-standalone/fossology-3.11.0/src/copyright/agent_tests/testdata/ |
| H A D | testdata11 | 48 #define FPSCR_DN (1 << 18)
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| H A D | testdata11_raw | 48 #define FPSCR_DN (1 << 18)
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