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Searched refs:FSL_IMX6UL_NUM_GPIOS (Results 1 – 18 of 18) sorted by relevance

/dports/emulators/qemu42/qemu-4.2.1/hw/arm/
H A Dfsl-imx6ul.c76 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_init()
255 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_realize()
256 static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
264 static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
272 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/
H A Dfsl-imx6ul.c76 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_init()
255 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_realize()
256 static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
264 static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
272 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/arm/
H A Dfsl-imx6ul.c78 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_init()
277 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_realize()
278 static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
286 static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
294 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
/dports/emulators/qemu/qemu-6.2.0/hw/arm/
H A Dfsl-imx6ul.c74 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_init()
249 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_realize()
250 static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
258 static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
266 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
/dports/emulators/qemu60/qemu-6.0.0/hw/arm/
H A Dfsl-imx6ul.c74 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_init()
249 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_realize()
250 static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
258 static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
266 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
/dports/emulators/qemu5/qemu-5.2.0/hw/arm/
H A Dfsl-imx6ul.c74 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_init()
249 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_realize()
250 static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
258 static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
266 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/arm/
H A Dfsl-imx6ul.c77 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_init()
268 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_realize()
269 static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
277 static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
285 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/arm/
H A Dfsl-imx6ul.c77 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_init()
268 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_realize()
269 static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
277 static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
285 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/arm/
H A Dfsl-imx6ul.c74 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_init()
249 for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { in fsl_imx6ul_realize()
250 static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
258 static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
266 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { in fsl_imx6ul_realize()
/dports/emulators/qemu42/qemu-4.2.1/include/hw/arm/
H A Dfsl-imx6ul.h53 FSL_IMX6UL_NUM_GPIOS = 5, enumerator
68 IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS];
/dports/emulators/qemu/qemu-6.2.0/include/hw/arm/
H A Dfsl-imx6ul.h56 FSL_IMX6UL_NUM_GPIOS = 5, enumerator
73 IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS];
/dports/emulators/qemu60/qemu-6.0.0/include/hw/arm/
H A Dfsl-imx6ul.h56 FSL_IMX6UL_NUM_GPIOS = 5, enumerator
73 IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS];
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/arm/
H A Dfsl-imx6ul.h53 FSL_IMX6UL_NUM_GPIOS = 5, enumerator
68 IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS];
/dports/emulators/qemu5/qemu-5.2.0/include/hw/arm/
H A Dfsl-imx6ul.h56 FSL_IMX6UL_NUM_GPIOS = 5, enumerator
73 IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS];
/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/arm/
H A Dfsl-imx6ul.h53 FSL_IMX6UL_NUM_GPIOS = 5, enumerator
68 IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS];
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/arm/
H A Dfsl-imx6ul.h55 FSL_IMX6UL_NUM_GPIOS = 5,
72 IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS];
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/arm/
H A Dfsl-imx6ul.h56 FSL_IMX6UL_NUM_GPIOS = 5, enumerator
73 IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS];
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/arm/
H A Dfsl-imx6ul.h55 FSL_IMX6UL_NUM_GPIOS = 5, enumerator
72 IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS];