| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall_s10.h | 111 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall_s10.h | 111 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall.h | 120 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall.h | 120 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall.h | 120 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall.h | 120 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall.h | 120 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall.h | 120 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall.h | 120 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall.h | 120 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/ |
| H A D | firewall.h | 120 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/altera/ |
| H A D | sdram_agilex.c | 126 FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
|