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Searched refs:FspsUpd (Results 1 – 25 of 54) sorted by relevance

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/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/
H A DPeiPchPolicyUpdate.c49 IN OUT FSPS_UPD *FspsUpd in PeiFspPchPolicyUpdate() argument
66 FspsUpd->FspsConfig.ScsEmmcEnabled = 1; in PeiFspPchPolicyUpdate()
67 FspsUpd->FspsConfig.ScsEmmcHs400Enabled = 1; in PeiFspPchPolicyUpdate()
68 FspsUpd->FspsConfig.ScsSdCardEnabled = 0; in PeiFspPchPolicyUpdate()
69 FspsUpd->FspsConfig.ScsUfsEnabled = 0; in PeiFspPchPolicyUpdate()
71 FspsUpd->FspsConfig.SataPwrOptEnable = 1; in PeiFspPchPolicyUpdate()
73 FspsUpd->FspsConfig.GpioIrqRoute = 14; in PeiFspPchPolicyUpdate()
74 FspsUpd->FspsConfig.SciIrqSelect = 9; in PeiFspPchPolicyUpdate()
75 FspsUpd->FspsConfig.TcoIrqEnable = 0; in PeiFspPchPolicyUpdate()
76 FspsUpd->FspsConfig.TcoIrqSelect = 9; in PeiFspPchPolicyUpdate()
[all …]
H A DPeiSaPolicyUpdate.c35 IN OUT FSPS_UPD *FspsUpd in PeiFspSaPolicyUpdate() argument
44 FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1; in PeiFspSaPolicyUpdate()
58 FspsUpd->FspsConfig.GraphicsConfigPtr = 0; in PeiFspSaPolicyUpdate()
73 FspsUpd->FspsConfig.LogoPtr = (UINT32)(UINTN)MemBuffer; in PeiFspSaPolicyUpdate()
74 FspsUpd->FspsConfig.LogoSize = Size; in PeiFspSaPolicyUpdate()
77 FspsUpd->FspsConfig.LogoPtr = 0; in PeiFspSaPolicyUpdate()
78 FspsUpd->FspsConfig.LogoSize = 0; in PeiFspSaPolicyUpdate()
89 FspsUpd->FspsConfig.TdcEnable[0] = 0x1; in PeiFspSaPolicyUpdate()
90 FspsUpd->FspsConfig.TdcEnable[1] = 0x1; in PeiFspSaPolicyUpdate()
91 FspsUpd->FspsConfig.TdcEnable[3] = 0x1; in PeiFspSaPolicyUpdate()
[all …]
H A DPeiFspPolicyUpdateLib.c35 IN OUT FSPS_UPD *FspsUpd
115 IN OUT VOID *FspsUpd in SiliconPolicyUpdatePostMem() argument
120 FspsUpdDataPtr = FspsUpd; in SiliconPolicyUpdatePostMem()
122 PeiFspPchPolicyUpdate (FspsUpd); in SiliconPolicyUpdatePostMem()
125 return FspsUpd; in SiliconPolicyUpdatePostMem()
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/CometlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/
H A DPeiFspPchPolicyInitLib.c207 IN OUT FSPS_UPD *FspsUpd
336 FspsUpd->FspsConfig.ScsUfsEnabled = 0;
369 FspsUpd->FspsConfig.PcieRpDpcMask = 0;
370 FspsUpd->FspsConfig.PcieRpDpcExtensionsMask = 0;
371 FspsUpd->FspsConfig.PcieRpPtmMask = 0;
573 FspsUpd->FspsConfig.SerialIoSpi0CsPolarity[0] = 1;
574 FspsUpd->FspsConfig.SerialIoSpi0CsPolarity[1] = 0;
575 FspsUpd->FspsConfig.SerialIoSpi1CsPolarity[0] = 0;
576 FspsUpd->FspsConfig.SerialIoSpi1CsPolarity[1] = 0;
577 FspsUpd->FspsConfig.SerialIoSpi2CsPolarity[0] = 1;
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H A DPeiFspCpuPolicyInitLib.c280 IN OUT FSPS_UPD *FspsUpd in PeiFspCpuPolicyInit() argument
328 FspsUpd->FspsConfig.AesEnable = (UINT8) CpuConfig->AesEnable; in PeiFspCpuPolicyInit()
329 FspsUpd->FspsConfig.DebugInterfaceEnable = (UINT8) CpuConfig->DebugInterfaceEnable; in PeiFspCpuPolicyInit()
331 FspsUpd->FspsConfig.TurboMode = (UINT8) CpuPowerMgmtBasicConfig->TurboMode; in PeiFspCpuPolicyInit()
340 FspsUpd->FspsTestConfig.ApIdleManner = PcdGet8 (PcdCpuApLoopMode); in PeiFspCpuPolicyInit()
343 FspsUpd->FspsTestConfig.ProcessorTraceMemBase = CpuTestConfig->ProcessorTraceMemBase; in PeiFspCpuPolicyInit()
348 FspsUpd->FspsTestConfig.CpuWakeUpTimer = (UINT8) CpuTestConfig->CpuWakeUpTimer; in PeiFspCpuPolicyInit()
358 FspsUpd->FspsTestConfig.Hwp = (UINT8) CpuPowerMgmtBasicConfig->Hwp; in PeiFspCpuPolicyInit()
413 FspsUpd->FspsTestConfig.Cx = (UINT8) CpuPowerMgmtTestConfig->Cx; in PeiFspCpuPolicyInit()
415 FspsUpd->FspsTestConfig.C1e = (UINT8) CpuPowerMgmtTestConfig->C1e; in PeiFspCpuPolicyInit()
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H A DPeiFspPolicyInitLib.c119 IN OUT FSPS_UPD *FspsUpd in FspPolicyInit() argument
127 Status = PeiFspSiPolicyInit (FspsUpd); in FspPolicyInit()
135 Status = PeiFspPchPolicyInit (FspsUpd); in FspPolicyInit()
143 Status = PeiFspMePolicyInit (FspsUpd); in FspPolicyInit()
151 Status = PeiFspSaPolicyInit (FspsUpd); in FspPolicyInit()
159 Status = PeiFspCpuPolicyInit (FspsUpd); in FspPolicyInit()
167 Status = PeiFspSecurityPolicyInit(FspsUpd); in FspPolicyInit()
198 IN OUT VOID *FspsUpd in SiliconPolicyInitPostMem() argument
201 FspPolicyInit((FSPS_UPD *)FspsUpd); in SiliconPolicyInitPostMem()
202 return FspsUpd; in SiliconPolicyInitPostMem()
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H A DPeiFspPolicyInitLib.h49 IN OUT FSPS_UPD *FspsUpd
79 IN OUT FSPS_UPD *FspsUpd
139 IN OUT FSPS_UPD *FspsUpd
169 IN OUT FSPS_UPD *FspsUpd
184 IN OUT FSPS_UPD *FspsUpd
199 IN OUT FSPS_UPD *FspsUpd
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/
H A DPeiFspPchPolicyInitLib.c207 IN OUT FSPS_UPD *FspsUpd in PeiFspPchPolicyInit() argument
336 FspsUpd->FspsConfig.ScsUfsEnabled = 0; in PeiFspPchPolicyInit()
369 FspsUpd->FspsConfig.PcieRpDpcMask = 0; in PeiFspPchPolicyInit()
370 FspsUpd->FspsConfig.PcieRpDpcExtensionsMask = 0; in PeiFspPchPolicyInit()
371 FspsUpd->FspsConfig.PcieRpPtmMask = 0; in PeiFspPchPolicyInit()
389 FspsUpd->FspsConfig.PcieRpDpcMask |= (BIT0<<Index); in PeiFspPchPolicyInit()
392 FspsUpd->FspsConfig.PcieRpDpcExtensionsMask |= (BIT0<<Index); in PeiFspPchPolicyInit()
395 FspsUpd->FspsConfig.PcieRpPtmMask |= (BIT0<<Index); in PeiFspPchPolicyInit()
550 FspsUpd->FspsConfig.PchUsbHsioRxTuningEnable[Index] = Data8; in PeiFspPchPolicyInit()
558 FspsUpd->FspsConfig.PchUsbHsioFilterSel[Index] = Data8; in PeiFspPchPolicyInit()
[all …]
H A DPeiFspCpuPolicyInitLib.c281 IN OUT FSPS_UPD *FspsUpd in PeiFspCpuPolicyInit() argument
329 FspsUpd->FspsConfig.AesEnable = (UINT8) CpuConfig->AesEnable; in PeiFspCpuPolicyInit()
330 FspsUpd->FspsConfig.DebugInterfaceEnable = (UINT8) CpuConfig->DebugInterfaceEnable; in PeiFspCpuPolicyInit()
332 FspsUpd->FspsConfig.TurboMode = (UINT8) CpuPowerMgmtBasicConfig->TurboMode; in PeiFspCpuPolicyInit()
341 FspsUpd->FspsTestConfig.ApIdleManner = PcdGet8 (PcdCpuApLoopMode); in PeiFspCpuPolicyInit()
344 FspsUpd->FspsTestConfig.ProcessorTraceMemBase = CpuTestConfig->ProcessorTraceMemBase; in PeiFspCpuPolicyInit()
349 FspsUpd->FspsTestConfig.CpuWakeUpTimer = (UINT8) CpuTestConfig->CpuWakeUpTimer; in PeiFspCpuPolicyInit()
359 FspsUpd->FspsTestConfig.Hwp = (UINT8) CpuPowerMgmtBasicConfig->Hwp; in PeiFspCpuPolicyInit()
414 FspsUpd->FspsTestConfig.Cx = (UINT8) CpuPowerMgmtTestConfig->Cx; in PeiFspCpuPolicyInit()
416 FspsUpd->FspsTestConfig.C1e = (UINT8) CpuPowerMgmtTestConfig->C1e; in PeiFspCpuPolicyInit()
[all …]
H A DPeiFspPolicyInitLib.c119 IN OUT FSPS_UPD *FspsUpd
127 Status = PeiFspSiPolicyInit (FspsUpd);
135 Status = PeiFspPchPolicyInit (FspsUpd);
143 Status = PeiFspMePolicyInit (FspsUpd);
151 Status = PeiFspSaPolicyInit (FspsUpd);
159 Status = PeiFspCpuPolicyInit (FspsUpd);
167 Status = PeiFspSecurityPolicyInit(FspsUpd);
198 IN OUT VOID *FspsUpd
201 FspPolicyInit((FSPS_UPD *)FspsUpd);
202 return FspsUpd;
[all …]
H A DPeiFspPolicyInitLib.h49 IN OUT FSPS_UPD *FspsUpd
79 IN OUT FSPS_UPD *FspsUpd
139 IN OUT FSPS_UPD *FspsUpd
169 IN OUT FSPS_UPD *FspsUpd
184 IN OUT FSPS_UPD *FspsUpd
199 IN OUT FSPS_UPD *FspsUpd
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/
H A DPeiFspPchPolicyInitLib.c204 IN OUT FSPS_UPD *FspsUpd
292 FspsUpd->FspsConfig.PchLanEnable = (UINT8)LanConfig->Enable;
324 FspsUpd->FspsConfig.PchCio2Enable = (UINT8)Cio2Config->DeviceEnable;
365 FspsUpd->FspsConfig.PchIshEnable = (UINT8)IshConfig->Enable;
471 FspsUpd->FspsConfig.SataMode = (UINT8)SataConfig->SataMode;
472 FspsUpd->FspsConfig.SataSpeedLimit = (UINT8)SataConfig->SpeedLimit;
575 FspsUpd->FspsConfig.PchDmiAspm = (UINT8)DmiConfig->DmiAspm;
578 FspsUpd->FspsConfig.PchDmiAspm = 0;
579 FspsUpd->FspsConfig.PchLegacyIoLowLatency = TRUE;
607 FspsUpd->FspsTestConfig.PchSbiUnlock = (UINT8)P2sbConfig->SbiUnlock;
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H A DPeiFspCpuPolicyInitLib.c176 IN OUT FSPS_UPD *FspsUpd in PeiFspCpuPolicyInit() argument
226 FspsUpd->FspsConfig.MicrocodePatchAddress = CpuConfig->MicrocodePatchAddress; in PeiFspCpuPolicyInit()
228 FspsUpd->FspsConfig.TurboMode = (UINT8) CpuPowerMgmtBasicConfig->TurboMode; in PeiFspCpuPolicyInit()
238 FspsUpd->FspsTestConfig.ApIdleManner = (UINT8) CpuTestConfig->ApIdleManner; in PeiFspCpuPolicyInit()
239 FspsUpd->FspsTestConfig.ApHandoffManner = (UINT8) CpuTestConfig->ApHandoffManner; in PeiFspCpuPolicyInit()
241 FspsUpd->FspsTestConfig.ProcTraceEnable = (UINT8) CpuTestConfig->ProcTraceEnable; in PeiFspCpuPolicyInit()
242 FspsUpd->FspsTestConfig.ProcTraceMemSize = (UINT8) CpuTestConfig->ProcTraceMemSize; in PeiFspCpuPolicyInit()
254 FspsUpd->FspsTestConfig.Hwp = (UINT8) CpuPowerMgmtBasicConfig->Hwp; in PeiFspCpuPolicyInit()
302 FspsUpd->FspsTestConfig.Cx = (UINT8) CpuPowerMgmtTestConfig->Cx; in PeiFspCpuPolicyInit()
333 FspsUpd->FspsConfig.CpuS3ResumeMtrrData = S3BspMtrrTablePointer; in PeiFspCpuPolicyInit()
[all …]
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/
H A DPeiFspPchPolicyInitLib.c141 IN OUT FSPS_UPD *FspsUpd, in UpdateUsb20OverCurrentPolicy() argument
149 FspsUpd->FspsConfig.Usb2OverCurrentPin[PortIndex], in UpdateUsb20OverCurrentPolicy()
171 IN OUT FSPS_UPD *FspsUpd, in UpdateUsb30OverCurrentPolicy() argument
179 FspsUpd->FspsConfig.Usb3OverCurrentPin[PortIndex], in UpdateUsb30OverCurrentPolicy()
200 IN OUT FSPS_UPD *FspsUpd, in UpdatePchUsbConfig() argument
260 IN OUT FSPS_UPD *FspsUpd, in UpdateCnviConfig() argument
282 IN OUT FSPS_UPD *FspsUpd in PeiFspPchPolicyInit() argument
335 UPDATE_POLICY (FspsUpd->FspsConfig.SataEnable, SataConfig->Enable, TRUE); in PeiFspPchPolicyInit()
336 UPDATE_POLICY (FspsUpd->FspsConfig.SataMode, SataConfig->SataMode, SataModeAhci); in PeiFspPchPolicyInit()
345 UpdatePchUsbConfig (FspsUpd, UsbConfig); in PeiFspPchPolicyInit()
[all …]
H A DPeiFspPolicyInitLib.c183 IN OUT FSPS_UPD *FspsUpd
191 Status = PeiFspPchPolicyInit (FspsUpd);
199 Status = PeiFspMePolicyInit (FspsUpd);
207 Status = PeiFspSaPolicyInit (FspsUpd);
215 Status = PeiFspSecurityPolicyInit(FspsUpd);
246 IN OUT VOID *FspsUpd
249 DEBUG ((DEBUG_INFO, "FspsUpd - 0x%x\n", FspsUpd));
250 FspPolicyInit ((FSPS_UPD *) FspsUpd);
251 return FspsUpd;
302 IN OUT VOID *FspsUpd
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/
H A DPeiSaPolicyUpdate.c33 IN OUT FSPS_UPD *FspsUpd in PeiFspSaPolicyUpdate() argument
42 FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1; in PeiFspSaPolicyUpdate()
53 FspsUpd->FspsConfig.GraphicsConfigPtr = (UINT32)(UINTN)MemBuffer; in PeiFspSaPolicyUpdate()
56 FspsUpd->FspsConfig.GraphicsConfigPtr = 0; in PeiFspSaPolicyUpdate()
59 …DEBUG((DEBUG_INFO, "Vbt Pointer from PeiGetSectionFromFv is 0x%x\n", FspsUpd->FspsConfig.GraphicsC… in PeiFspSaPolicyUpdate()
71 FspsUpd->FspsConfig.LogoPtr = (UINT32)(UINTN)MemBuffer; in PeiFspSaPolicyUpdate()
72 FspsUpd->FspsConfig.LogoSize = Size; in PeiFspSaPolicyUpdate()
75 FspsUpd->FspsConfig.LogoPtr = 0; in PeiFspSaPolicyUpdate()
76 FspsUpd->FspsConfig.LogoSize = 0; in PeiFspSaPolicyUpdate()
79 DEBUG((DEBUG_INFO, "LogoPtr from PeiGetSectionFromFv is 0x%x\n", FspsUpd->FspsConfig.LogoPtr)); in PeiFspSaPolicyUpdate()
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H A DPeiPchPolicyUpdate.c39 IN OUT FSPS_UPD *FspsUpd in PeiFspPchPolicyUpdate() argument
42 FspsUpd->FspsConfig.PchPcieDeviceOverrideTablePtr = (UINT32) mPcieDeviceTable; in PeiFspPchPolicyUpdate()
46 &(FspsUpd->FspsConfig.PchHdaVerbTableEntryNum), in PeiFspPchPolicyUpdate()
47 &(FspsUpd->FspsConfig.PchHdaVerbTablePtr) in PeiFspPchPolicyUpdate()
52FspsUpd->FspsConfig.SerialIoDevMode[PchSerialIoIndexUart0 + PcdGet8 (PcdSerialIoUartNumber)] == Pc… in PeiFspPchPolicyUpdate()
53FspsUpd->FspsConfig.SerialIoDevMode[PchSerialIoIndexUart0 + PcdGet8 (PcdSerialIoUartNumber)] = Pch… in PeiFspPchPolicyUpdate()
H A DPeiFspPolicyUpdateLib.c34 IN OUT FSPS_UPD *FspsUpd
113 IN OUT VOID *FspsUpd in SiliconPolicyUpdatePostMem() argument
118 FspsUpdDataPtr = FspsUpd; in SiliconPolicyUpdatePostMem()
120 PeiFspPchPolicyUpdate (FspsUpd); in SiliconPolicyUpdatePostMem()
123 return FspsUpd; in SiliconPolicyUpdatePostMem()
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/CometlakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/
H A DPeiSaPolicyUpdate.c33 IN OUT FSPS_UPD *FspsUpd in PeiFspSaPolicyUpdate() argument
42 FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1; in PeiFspSaPolicyUpdate()
53 FspsUpd->FspsConfig.GraphicsConfigPtr = (UINT32)(UINTN)MemBuffer; in PeiFspSaPolicyUpdate()
56 FspsUpd->FspsConfig.GraphicsConfigPtr = 0; in PeiFspSaPolicyUpdate()
59 …DEBUG((DEBUG_INFO, "Vbt Pointer from PeiGetSectionFromFv is 0x%x\n", FspsUpd->FspsConfig.GraphicsC… in PeiFspSaPolicyUpdate()
71 FspsUpd->FspsConfig.LogoPtr = (UINT32)(UINTN)MemBuffer; in PeiFspSaPolicyUpdate()
72 FspsUpd->FspsConfig.LogoSize = Size; in PeiFspSaPolicyUpdate()
75 FspsUpd->FspsConfig.LogoPtr = 0; in PeiFspSaPolicyUpdate()
76 FspsUpd->FspsConfig.LogoSize = 0; in PeiFspSaPolicyUpdate()
79 DEBUG((DEBUG_INFO, "LogoPtr from PeiGetSectionFromFv is 0x%x\n", FspsUpd->FspsConfig.LogoPtr)); in PeiFspSaPolicyUpdate()
[all …]
H A DPeiPchPolicyUpdate.c39 IN OUT FSPS_UPD *FspsUpd in PeiFspPchPolicyUpdate() argument
42 FspsUpd->FspsConfig.PchPcieDeviceOverrideTablePtr = (UINT32) mPcieDeviceTable; in PeiFspPchPolicyUpdate()
46 &(FspsUpd->FspsConfig.PchHdaVerbTableEntryNum), in PeiFspPchPolicyUpdate()
47 &(FspsUpd->FspsConfig.PchHdaVerbTablePtr) in PeiFspPchPolicyUpdate()
52FspsUpd->FspsConfig.SerialIoUartMode[PchSerialIoIndexUart0 + PcdGet8 (PcdSerialIoUartNumber)] == P… in PeiFspPchPolicyUpdate()
53FspsUpd->FspsConfig.SerialIoUartMode[PchSerialIoIndexUart0 + PcdGet8 (PcdSerialIoUartNumber)] = Pc… in PeiFspPchPolicyUpdate()
H A DPeiFspPolicyUpdateLib.c34 IN OUT FSPS_UPD *FspsUpd
113 IN OUT VOID *FspsUpd in SiliconPolicyUpdatePostMem() argument
118 FspsUpdDataPtr = FspsUpd; in SiliconPolicyUpdatePostMem()
120 PeiFspPchPolicyUpdate (FspsUpd); in SiliconPolicyUpdatePostMem()
123 return FspsUpd; in SiliconPolicyUpdatePostMem()
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/
H A DPeiSaPolicyUpdate.c33 IN OUT FSPS_UPD *FspsUpd in PeiFspSaPolicyUpdate() argument
42 FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1; in PeiFspSaPolicyUpdate()
53 FspsUpd->FspsConfig.GraphicsConfigPtr = (UINT32)(UINTN)MemBuffer; in PeiFspSaPolicyUpdate()
56 FspsUpd->FspsConfig.GraphicsConfigPtr = 0; in PeiFspSaPolicyUpdate()
59 …DEBUG((DEBUG_INFO, "Vbt Pointer from PeiGetSectionFromFv is 0x%x\n", FspsUpd->FspsConfig.GraphicsC… in PeiFspSaPolicyUpdate()
71 FspsUpd->FspsConfig.LogoPtr = (UINT32)(UINTN)MemBuffer; in PeiFspSaPolicyUpdate()
72 FspsUpd->FspsConfig.LogoSize = Size; in PeiFspSaPolicyUpdate()
75 FspsUpd->FspsConfig.LogoPtr = 0; in PeiFspSaPolicyUpdate()
76 FspsUpd->FspsConfig.LogoSize = 0; in PeiFspSaPolicyUpdate()
79 DEBUG((DEBUG_INFO, "LogoPtr from PeiGetSectionFromFv is 0x%x\n", FspsUpd->FspsConfig.LogoPtr)); in PeiFspSaPolicyUpdate()
[all …]
H A DPeiPchPolicyUpdate.c75 IN OUT FSPS_UPD *FspsUpd, in InternalAddPlatformVerbTables() argument
114 FspsUpd->FspsConfig.PchHdaVerbTableEntryNum = VerbTableEntryNum; in InternalAddPlatformVerbTables()
118 FspsUpd->FspsConfig.PchHdaVerbTablePtr = (UINT32) VerbTablePtr; in InternalAddPlatformVerbTables()
133 IN OUT FSPS_UPD *FspsUpd in PeiFspPchPolicyUpdate() argument
137 FspsUpd->FspsConfig.PchSubSystemVendorId = V_PCH_INTEL_VENDOR_ID; in PeiFspPchPolicyUpdate()
138 FspsUpd->FspsConfig.PchSubSystemId = V_PCH_DEFAULT_SID; in PeiFspPchPolicyUpdate()
140 FspsUpd->FspsConfig.PchPcieDeviceOverrideTablePtr = (UINT32) mPcieDeviceTable; in PeiFspPchPolicyUpdate()
142 InternalAddPlatformVerbTables (FspsUpd, PchHdaCodecPlatformOnboard, PcdGet8 (PcdAudioConnector)); in PeiFspPchPolicyUpdate()
146FspsUpd->FspsConfig.SerialIoDevMode[PchSerialIoIndexUart0 + PcdGet8 (PcdSerialIoUartNumber)] == Pc… in PeiFspPchPolicyUpdate()
147FspsUpd->FspsConfig.SerialIoDevMode[PchSerialIoIndexUart0 + PcdGet8 (PcdSerialIoUartNumber)] = Pch… in PeiFspPchPolicyUpdate()
[all …]
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/
H A DPeiSaPolicyUpdate.c33 IN OUT FSPS_UPD *FspsUpd in PeiFspSaPolicyUpdate() argument
42 FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1; in PeiFspSaPolicyUpdate()
53 FspsUpd->FspsConfig.GraphicsConfigPtr = (UINT32)(UINTN)MemBuffer; in PeiFspSaPolicyUpdate()
56 FspsUpd->FspsConfig.GraphicsConfigPtr = 0; in PeiFspSaPolicyUpdate()
59 …DEBUG((DEBUG_INFO, "Vbt Pointer from PeiGetSectionFromFv is 0x%x\n", FspsUpd->FspsConfig.GraphicsC… in PeiFspSaPolicyUpdate()
71 FspsUpd->FspsConfig.LogoPtr = (UINT32)(UINTN)MemBuffer; in PeiFspSaPolicyUpdate()
72 FspsUpd->FspsConfig.LogoSize = Size; in PeiFspSaPolicyUpdate()
75 FspsUpd->FspsConfig.LogoPtr = 0; in PeiFspSaPolicyUpdate()
76 FspsUpd->FspsConfig.LogoSize = 0; in PeiFspSaPolicyUpdate()
79 DEBUG((DEBUG_INFO, "LogoPtr from PeiGetSectionFromFv is 0x%x\n", FspsUpd->FspsConfig.LogoPtr)); in PeiFspSaPolicyUpdate()
[all …]
H A DPeiPchPolicyUpdate.c75 IN OUT FSPS_UPD *FspsUpd, in InternalAddPlatformVerbTables() argument
114 FspsUpd->FspsConfig.PchHdaVerbTableEntryNum = VerbTableEntryNum; in InternalAddPlatformVerbTables()
118 FspsUpd->FspsConfig.PchHdaVerbTablePtr = (UINT32) VerbTablePtr; in InternalAddPlatformVerbTables()
133 IN OUT FSPS_UPD *FspsUpd in PeiFspPchPolicyUpdate() argument
137 FspsUpd->FspsConfig.PchSubSystemVendorId = V_PCH_INTEL_VENDOR_ID; in PeiFspPchPolicyUpdate()
138 FspsUpd->FspsConfig.PchSubSystemId = V_PCH_DEFAULT_SID; in PeiFspPchPolicyUpdate()
140 FspsUpd->FspsConfig.PchPcieDeviceOverrideTablePtr = (UINT32) mPcieDeviceTable; in PeiFspPchPolicyUpdate()
142 InternalAddPlatformVerbTables (FspsUpd, PchHdaCodecPlatformOnboard, PcdGet8 (PcdAudioConnector)); in PeiFspPchPolicyUpdate()
146FspsUpd->FspsConfig.SerialIoDevMode[PchSerialIoIndexUart0 + PcdGet8 (PcdSerialIoUartNumber)] == Pc… in PeiFspPchPolicyUpdate()
147FspsUpd->FspsConfig.SerialIoDevMode[PchSerialIoIndexUart0 + PcdGet8 (PcdSerialIoUartNumber)] = Pch… in PeiFspPchPolicyUpdate()

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