| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 316 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 1579 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
11041 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
13612 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
13766 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
14022 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
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| H A D | AArch64SVEInstrInfo.td | 91 def AArch64ldff1_gather_imm_z : SDNode<"AArch64ISD::GLDFF1_IMM_MERGE_ZERO", SDT_AAr…
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| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 316 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 1582 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
11073 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
13647 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
13801 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
14057 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
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| H A D | AArch64SVEInstrInfo.td | 91 def AArch64ldff1_gather_imm_z : SDNode<"AArch64ISD::GLDFF1_IMM_MERGE_ZERO", SDT_AAr…
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 352 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 1835 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
11940 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
14741 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
14893 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
15159 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
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| H A D | AArch64SVEInstrInfo.td | 91 def AArch64ldff1_gather_imm_z : SDNode<"AArch64ISD::GLDFF1_IMM_MERGE_ZERO", SDT_AAr…
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| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 359 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 1962 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
12512 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
15361 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
15516 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
15785 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
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| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 359 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 1962 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
12512 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
15361 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
15516 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
15785 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 376 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 2139 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
13226 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
16278 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
16433 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
16814 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 376 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 2139 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
13226 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
16278 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
16433 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
16814 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 376 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 2139 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
13226 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
16278 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
16433 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
16814 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
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| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 376 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 2139 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
13226 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
16278 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
16433 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
16814 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 376 GLDFF1_IMM_MERGE_ZERO, enumerator
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| H A D | AArch64ISelLowering.cpp | 2139 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
13226 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
16278 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
16433 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
16814 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 376 GLDFF1_IMM_MERGE_ZERO, enumerator
|
| H A D | AArch64ISelLowering.cpp | 2166 MAKE_CASE(AArch64ISD::GLDFF1_IMM_MERGE_ZERO) in getTargetNodeName()
13483 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSVEAndCombine()
16578 Opcode == AArch64ISD::GLDFF1_IMM_MERGE_ZERO) { in performGatherLoadCombine()
16733 case AArch64ISD::GLDFF1_IMM_MERGE_ZERO: in performSignExtendInRegCombine()
17116 AArch64ISD::GLDFF1_IMM_MERGE_ZERO); in PerformDAGCombine()
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