/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 310 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 1573 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 11035 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 13622 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 13748 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 14000 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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H A D | AArch64SVEInstrInfo.td | 85 def AArch64ldff1_gather_z : SDNode<"AArch64ISD::GLDFF1_MERGE_ZERO", SDT_AAr…
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 310 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 1576 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 11067 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 13657 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 13783 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 14035 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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H A D | AArch64SVEInstrInfo.td | 85 def AArch64ldff1_gather_z : SDNode<"AArch64ISD::GLDFF1_MERGE_ZERO", SDT_AAr…
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 346 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 1829 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 11934 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 14751 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 14875 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 15137 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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H A D | AArch64SVEInstrInfo.td | 85 def AArch64ldff1_gather_z : SDNode<"AArch64ISD::GLDFF1_MERGE_ZERO", SDT_AAr…
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 353 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 1956 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 12506 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 15371 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 15498 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 15763 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 353 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 1956 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 12506 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 15371 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 15498 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 15763 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 370 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 2133 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 13220 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 16288 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 16415 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 16792 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 370 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 2133 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 13220 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 16288 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 16415 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 16792 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 370 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 2133 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 13220 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 16288 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 16415 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 16792 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 370 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 2133 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 13220 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 16288 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 16415 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 16792 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 370 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 2133 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 13220 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 16288 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 16415 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 16792 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 370 GLDFF1_MERGE_ZERO, enumerator
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H A D | AArch64ISelLowering.cpp | 2160 MAKE_CASE(AArch64ISD::GLDFF1_MERGE_ZERO) in getTargetNodeName() 13477 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSVEAndCombine() 16588 : AArch64ISD::GLDFF1_MERGE_ZERO; in performGatherLoadCombine() 16715 case AArch64ISD::GLDFF1_MERGE_ZERO: in performSignExtendInRegCombine() 17094 return performGatherLoadCombine(N, DAG, AArch64ISD::GLDFF1_MERGE_ZERO); in PerformDAGCombine()
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