| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoXCheri.td | 255 def CSeal : Cheri_rr<0xb, "cseal", GPCR, GPCR>;
256 def CUnseal : Cheri_rr<0xc, "cunseal", GPCR, GPCR>;
636 (CLC_64 GPCR:$rd, GPCR:$rs1, 0)>;
638 (CSC_64 GPCR:$rs2, GPCR:$rs1, 0)>;
657 (CLC_128 GPCR:$rd, GPCR:$rs1, 0)>;
659 (CSC_128 GPCR:$rs2, GPCR:$rs1, 0)>;
822 : Pat<(OpNode GPCR:$rs1), (Inst GPCR:$rs1)>;
828 : Pat<(OpNode GPCR:$rs1, GPCR:$rs2), (Inst GPCR:$rs1, GPCR:$rs2)>;
887 def : Pat<(ptrtoint GPCR:$rs1), (CGetAddr GPCR:$rs1)>;
913 : Pat<(CondOp GPCR:$cs1, GPCR:$cs2),
[all …]
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-sa1100/ |
| H A D | badge4.c | 178 GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | in badge4_init()
193 GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); in badge4_init()
197 GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); in badge4_init()
201 GPCR = BADGE4_GPIO_MUXSEL0; in badge4_init()
206 GPCR = BADGE4_GPIO_TESTPT_J7; in badge4_init()
210 GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ in badge4_init()
283 GPCR = BADGE4_GPIO_PCMEN5V; in badge4_set_5V()
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| H A D | assabet.c | 128 GPCR = SDA; in adv7171_start()
144 GPCR = SCK; in adv7171_send()
149 GPCR = SDA; in adv7171_send()
154 GPCR = SCK; in adv7171_send()
164 GPCR = SCK | SDA; in adv7171_send()
178 GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */ in adv7171_write()
193 GPCR = (~gplr) & (SDA | SCK | MOD); in adv7171_write()
558 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; in assabet_init()
566 GPCR = GPIO_GPIO27; in assabet_init()
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| H A D | pm.c | 107 GPCR = ~gpio; in sa11x0_pm_enter()
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| H A D | pleb.c | 133 GPCR = GPIO_ETH0_EN; /* clear MCLK (enable smc) */ in pleb_map_io()
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-sa1100/ |
| H A D | badge4.c | 178 GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | in badge4_init()
193 GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); in badge4_init()
197 GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); in badge4_init()
201 GPCR = BADGE4_GPIO_MUXSEL0; in badge4_init()
206 GPCR = BADGE4_GPIO_TESTPT_J7; in badge4_init()
210 GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ in badge4_init()
283 GPCR = BADGE4_GPIO_PCMEN5V; in badge4_set_5V()
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| H A D | assabet.c | 128 GPCR = SDA; in adv7171_start()
144 GPCR = SCK; in adv7171_send()
149 GPCR = SDA; in adv7171_send()
154 GPCR = SCK; in adv7171_send()
164 GPCR = SCK | SDA; in adv7171_send()
178 GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */ in adv7171_write()
193 GPCR = (~gplr) & (SDA | SCK | MOD); in adv7171_write()
558 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; in assabet_init()
566 GPCR = GPIO_GPIO27; in assabet_init()
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| H A D | pm.c | 107 GPCR = ~gpio; in sa11x0_pm_enter()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-sa1100/ |
| H A D | badge4.c | 178 GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | in badge4_init()
193 GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); in badge4_init()
197 GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); in badge4_init()
201 GPCR = BADGE4_GPIO_MUXSEL0; in badge4_init()
206 GPCR = BADGE4_GPIO_TESTPT_J7; in badge4_init()
210 GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ in badge4_init()
283 GPCR = BADGE4_GPIO_PCMEN5V; in badge4_set_5V()
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| H A D | assabet.c | 128 GPCR = SDA; in adv7171_start()
144 GPCR = SCK; in adv7171_send()
149 GPCR = SDA; in adv7171_send()
154 GPCR = SCK; in adv7171_send()
164 GPCR = SCK | SDA; in adv7171_send()
178 GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */ in adv7171_write()
193 GPCR = (~gplr) & (SDA | SCK | MOD); in adv7171_write()
558 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; in assabet_init()
566 GPCR = GPIO_GPIO27; in assabet_init()
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| H A D | pm.c | 107 GPCR = ~gpio; in sa11x0_pm_enter()
|
| /dports/biology/p5-BioPerl-Run/BioPerl-Run-1.007003/t/data/ |
| H A D | prints.dat | 5 gi; Rhodopsin-like GPCR superfamily signature
8 mi; GPCR transmembrane motif I - 3
71 mi; GPCR transmembrane motif II - 3
134 mi; GPCR transmembrane motif III - 3
197 mi; GPCR transmembrane motif IV - 3
260 mi; GPCR transmembrane motif V - 3
323 mi; GPCR transmembrane motif VI - 3
386 mi; GPCR transmembrane motif VII - 3
|
| /dports/emulators/qemu42/qemu-4.2.1/hw/arm/ |
| H A D | pxa2xx_gpio.c | 58 GPCR, enumerator
74 PXA2XX_REG(GPCR, 0x024, 0x028, 0x02c, 0x124)
175 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_read()
228 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_write()
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| /dports/emulators/qemu/qemu-6.2.0/hw/arm/ |
| H A D | pxa2xx_gpio.c | 57 GPCR, enumerator
73 PXA2XX_REG(GPCR, 0x024, 0x028, 0x02c, 0x124)
174 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_read()
228 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_write()
|
| /dports/emulators/qemu60/qemu-6.0.0/hw/arm/ |
| H A D | pxa2xx_gpio.c | 57 GPCR, enumerator
73 PXA2XX_REG(GPCR, 0x024, 0x028, 0x02c, 0x124)
174 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_read()
228 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_write()
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| /dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/ |
| H A D | pxa2xx_gpio.c | 58 GPCR, enumerator
74 PXA2XX_REG(GPCR, 0x024, 0x028, 0x02c, 0x124)
175 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_read()
228 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_write()
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/arm/ |
| H A D | pxa2xx_gpio.c | 54 GPCR, enumerator
70 PXA2XX_REG(GPCR, 0x024, 0x028, 0x02c, 0x124)
171 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_read()
224 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_write()
|
| /dports/emulators/qemu5/qemu-5.2.0/hw/arm/ |
| H A D | pxa2xx_gpio.c | 57 GPCR, enumerator
73 PXA2XX_REG(GPCR, 0x024, 0x028, 0x02c, 0x124)
174 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_read()
228 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_write()
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/arm/ |
| H A D | pxa2xx_gpio.c | 58 GPCR, enumerator
74 PXA2XX_REG(GPCR, 0x024, 0x028, 0x02c, 0x124)
175 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_read()
228 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_write()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/arm/ |
| H A D | pxa2xx_gpio.c | 58 GPCR, enumerator
74 PXA2XX_REG(GPCR, 0x024, 0x028, 0x02c, 0x124)
175 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_read()
228 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_write()
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/arm/ |
| H A D | pxa2xx_gpio.c | 57 GPCR, enumerator
73 PXA2XX_REG(GPCR, 0x024, 0x028, 0x02c, 0x124)
174 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_read()
228 case GPCR: /* GPIO Pin-Output Clear registers */ in pxa2xx_gpio_write()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/ |
| H A D | mfp-pxa2xx.c | 34 #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24) macro
374 GPCR(i * 32) = ~PGSR(i); in pxa2xx_mfp_suspend()
398 GPCR(i * 32) = ~saved_gplr[i]; in pxa2xx_mfp_resume()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/ |
| H A D | mfp-pxa2xx.c | 34 #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24) macro
374 GPCR(i * 32) = ~PGSR(i); in pxa2xx_mfp_suspend()
398 GPCR(i * 32) = ~saved_gplr[i]; in pxa2xx_mfp_resume()
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/ |
| H A D | mfp-pxa2xx.c | 34 #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24) macro
374 GPCR(i * 32) = ~PGSR(i); in pxa2xx_mfp_suspend()
398 GPCR(i * 32) = ~saved_gplr[i]; in pxa2xx_mfp_resume()
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| /dports/devel/openwince-include/include-0.4.2/arm/sa11x0/ |
| H A D | gpio.h | 71 #define GPCR GPIO_pointer->gpcr macro
|