| /dports/games/flightgear-data/fgdata/Scenery/Terrain/w160n10/w156n19/ |
| H A D | 400247.stg | 2 OBJECT HI32.btg
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| H A D | .dirindex | 130 f:HI32.btg.gz:1e5debabac80fe8dd19673dd6f5098ba1dd1b320:2874
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| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/VE/ |
| H A D | VE.h | 100 inline static int64_t HI32(int64_t imm) { in HI32() function
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| H A D | VEFrameLowering.cpp | 134 .addImm(HI32(NumBytes)); in emitSPAdjustment()
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/ |
| H A D | VE.h | 100 inline static int64_t HI32(int64_t imm) { in HI32() function
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| H A D | VEFrameLowering.cpp | 134 .addImm(HI32(NumBytes)); in emitSPAdjustment()
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/VE/ |
| H A D | VE.h | 100 inline static int64_t HI32(int64_t imm) { in HI32() function
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| H A D | VEFrameLowering.cpp | 134 .addImm(HI32(NumBytes)); in emitSPAdjustment()
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| /dports/security/john/john-1.9.0-jumbo-1/src/yescrypt/ |
| H A D | yescrypt-opt.c | 436 #define HI32(X) \ macro
439 #define HI32(X) \ macro
442 #define HI32(X) \ macro
481 ((uint64_t)(uint32_t)_mm_cvtsi128_si32(HI32(X)) << 32))
508 X = _mm_mul_epu32(HI32(X), X); \
551 X = _mm_mul_epu32(HI32(X), X); \
561 X = _mm_mul_epu32(HI32(X), X); \
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| /dports/security/libxcrypt/libxcrypt-4.4.27/lib/ |
| H A D | alg-yescrypt-opt.c | 448 #define HI32(X) \
451 #define HI32(X) \
454 #define HI32(X) \
493 ((uint64_t)(uint32_t)_mm_cvtsi128_si32(HI32(X)) << 32)) in yescrypt()
520 X = _mm_mul_epu32(HI32(X), X); \
563 X = _mm_mul_epu32(HI32(X), X); \
573 X = _mm_mul_epu32(HI32(X), X); \ in N2log2()
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEInstrIntrinsicVL.td | 18 (HI32 (i64 0x0000000100000001))))>;
|
| H A D | VEInstrInfo.td | 58 def HI32 : SDNodeXForm<imm, [{
982 def : Pat<(add I64:$base, lozero:$disp), (LEASLrii $base, 0, (HI32 $disp))>;
1593 (LEASLzii 0, 0, (HI32 imm:$val))>;
1595 (LEASLrii (LEAzii 0, 0, (LO32 imm:$val)), 0, (HI32 imm:$val))>;
1598 (HI32 imm:$val))>;
1610 (LEASLrii $base, (LO7 $idx), (HI32 $disp))>;
1612 (LEASLrri $base, $idx, (HI32 $disp))>;
1619 // 2. LEASL %reg, label@HI32
1622 // LEASL %reg, label@HI32(, %reg)
1625 // LEASL %reg, label@HI32(%reg, %got)
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| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/VE/ |
| H A D | VEInstrIntrinsicVL.td | 18 (HI32 (i64 0x0000000100000001))))>;
|
| H A D | VEInstrInfo.td | 58 def HI32 : SDNodeXForm<imm, [{
982 def : Pat<(add I64:$base, lozero:$disp), (LEASLrii $base, 0, (HI32 $disp))>;
1593 (LEASLzii 0, 0, (HI32 imm:$val))>;
1595 (LEASLrii (LEAzii 0, 0, (LO32 imm:$val)), 0, (HI32 imm:$val))>;
1598 (HI32 imm:$val))>;
1610 (LEASLrii $base, (LO7 $idx), (HI32 $disp))>;
1612 (LEASLrri $base, $idx, (HI32 $disp))>;
1619 // 2. LEASL %reg, label@HI32
1622 // LEASL %reg, label@HI32(, %reg)
1625 // LEASL %reg, label@HI32(%reg, %got)
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| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEInstrIntrinsicVL.td | 18 (HI32 (i64 0x0000000100000001))))>;
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrIntrinsicVL.td | 18 (HI32 (i64 0x0000000100000001))))>;
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/VE/ |
| H A D | VEInstrIntrinsicVL.td | 18 (HI32 (i64 0x0000000100000001))))>;
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEInstrIntrinsicVL.td | 18 (HI32 (i64 0x0000000100000001))))>;
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEInstrIntrinsicVL.td | 18 (HI32 (i64 0x0000000100000001))))>;
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEInstrIntrinsicVL.td | 18 (HI32 (i64 0x0000000100000001))))>;
|
| /dports/devel/capstone3/capstone-3.0.5/arch/Mips/ |
| H A D | MipsGenRegisterInfo.inc | 1246 // HI32 Register Class...
1247 static const MCPhysReg HI32[] = {
1251 // HI32 Bit set.
1502 { "HI32", HI32, HI32Bits, 1, sizeof(HI32Bits), Mips_HI32RegClassID, 4, 4, 1, 1 },
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| /dports/emulators/qemu42/qemu-4.2.1/capstone/arch/Mips/ |
| H A D | MipsGenRegisterInfo.inc | 1246 // HI32 Register Class...
1247 static const MCPhysReg HI32[] = {
1251 // HI32 Bit set.
1502 { "HI32", HI32, HI32Bits, 1, sizeof(HI32Bits), Mips_HI32RegClassID, 4, 4, 1, 1 },
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/capstone/arch/Mips/ |
| H A D | MipsGenRegisterInfo.inc | 1246 // HI32 Register Class...
1247 static const MCPhysReg HI32[] = {
1251 // HI32 Bit set.
1502 { "HI32", HI32, HI32Bits, 1, sizeof(HI32Bits), Mips_HI32RegClassID, 4, 4, 1, 1 },
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| /dports/emulators/qemu-utils/qemu-4.2.1/capstone/arch/Mips/ |
| H A D | MipsGenRegisterInfo.inc | 1246 // HI32 Register Class...
1247 static const MCPhysReg HI32[] = {
1251 // HI32 Bit set.
1502 { "HI32", HI32, HI32Bits, 1, sizeof(HI32Bits), Mips_HI32RegClassID, 4, 4, 1, 1 },
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/capstone/arch/Mips/ |
| H A D | MipsGenRegisterInfo.inc | 1246 // HI32 Register Class...
1247 static const MCPhysReg HI32[] = {
1251 // HI32 Bit set.
1502 { "HI32", HI32, HI32Bits, 1, sizeof(HI32Bits), Mips_HI32RegClassID, 4, 4, 1, 1 },
|