Home
last modified time | relevance | path

Searched refs:HSTIM_HS_MODE_MASK (Results 1 – 25 of 66) sorted by relevance

123

/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/i2c/busses/
H A Di2c-bcm-kona.c78 #define HSTIM_HS_MODE_MASK 0x00008000 macro
521 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
549 writel(readl(dev->base + HSTIM_OFFSET) | HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing_hs()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/i2c/busses/
H A Di2c-bcm-kona.c78 #define HSTIM_HS_MODE_MASK 0x00008000 macro
521 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
549 writel(readl(dev->base + HSTIM_OFFSET) | HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing_hs()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/i2c/busses/
H A Di2c-bcm-kona.c78 #define HSTIM_HS_MODE_MASK 0x00008000 macro
521 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
549 writel(readl(dev->base + HSTIM_OFFSET) | HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing_hs()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/i2c/
H A Dkona_i2c.c69 #define HSTIM_HS_MODE_MASK 0x00008000 macro
469 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/i2c/
H A Dkona_i2c.c69 #define HSTIM_HS_MODE_MASK 0x00008000 macro
469 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/i2c/
H A Dkona_i2c.c71 #define HSTIM_HS_MODE_MASK 0x00008000 macro
465 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/i2c/
H A Dkona_i2c.c69 #define HSTIM_HS_MODE_MASK 0x00008000 macro
469 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()

123