| /dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 2478 LLT NVT = HalfTy; in narrowScalarShiftByConstant()
2479 unsigned NVTBits = HalfTy.getSizeInBits(); in narrowScalarShiftByConstant()
2578 const LLT HalfTy = LLT::scalar(NewBitSize); in narrowScalarShift() local
2607 auto LoS = MIRBuilder.buildShl(HalfTy, InH, Amt); in narrowScalarShift()
2609 auto OrLHS = MIRBuilder.buildShl(HalfTy, InH, Amt); in narrowScalarShift()
2611 auto HiS = MIRBuilder.buildOr(HalfTy, OrLHS, OrRHS); in narrowScalarShift()
2619 HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL)); in narrowScalarShift()
2627 auto HiS = MIRBuilder.buildLShr(HalfTy, InH, Amt); in narrowScalarShift()
2638 HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL)); in narrowScalarShift()
2647 auto HiS = MIRBuilder.buildAShr(HalfTy, InH, Amt); in narrowScalarShift()
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| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1456 LLT HalfTy = LLT::scalar(HalfSize); in applyCombineShiftToUnmerge() local
1459 auto Unmerge = Builder.buildUnmerge(HalfTy, SrcReg); in applyCombineShiftToUnmerge()
1471 Narrowed = Builder.buildLShr(HalfTy, Narrowed, in applyCombineShiftToUnmerge()
1472 Builder.buildConstant(HalfTy, NarrowShiftAmt)).getReg(0); in applyCombineShiftToUnmerge()
1475 auto Zero = Builder.buildConstant(HalfTy, 0); in applyCombineShiftToUnmerge()
1484 Narrowed = Builder.buildShl(HalfTy, Narrowed, in applyCombineShiftToUnmerge()
1488 auto Zero = Builder.buildConstant(HalfTy, 0); in applyCombineShiftToUnmerge()
1493 HalfTy, Unmerge.getReg(1), in applyCombineShiftToUnmerge()
1494 Builder.buildConstant(HalfTy, HalfSize - 1)); in applyCombineShiftToUnmerge()
1508 HalfTy, Unmerge.getReg(1), in applyCombineShiftToUnmerge()
[all …]
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| H A D | LegalizerHelper.cpp | 3513 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant()
3523 LLT NVT = HalfTy; in narrowScalarShiftByConstant()
3524 unsigned NVTBits = HalfTy.getSizeInBits(); in narrowScalarShiftByConstant()
3623 const LLT HalfTy = LLT::scalar(NewBitSize); in narrowScalarShift() local
3652 auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt); in narrowScalarShift()
3655 auto HiOr = MIRBuilder.buildShl(HalfTy, InH, Amt); in narrowScalarShift()
3656 auto HiS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift()
3664 HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL)); in narrowScalarShift()
3675 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt); in narrowScalarShift()
3677 auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift()
[all …]
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| /dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1456 LLT HalfTy = LLT::scalar(HalfSize); in applyCombineShiftToUnmerge() local
1459 auto Unmerge = Builder.buildUnmerge(HalfTy, SrcReg); in applyCombineShiftToUnmerge()
1471 Narrowed = Builder.buildLShr(HalfTy, Narrowed, in applyCombineShiftToUnmerge()
1472 Builder.buildConstant(HalfTy, NarrowShiftAmt)).getReg(0); in applyCombineShiftToUnmerge()
1475 auto Zero = Builder.buildConstant(HalfTy, 0); in applyCombineShiftToUnmerge()
1484 Narrowed = Builder.buildShl(HalfTy, Narrowed, in applyCombineShiftToUnmerge()
1488 auto Zero = Builder.buildConstant(HalfTy, 0); in applyCombineShiftToUnmerge()
1493 HalfTy, Unmerge.getReg(1), in applyCombineShiftToUnmerge()
1494 Builder.buildConstant(HalfTy, HalfSize - 1)); in applyCombineShiftToUnmerge()
1508 HalfTy, Unmerge.getReg(1), in applyCombineShiftToUnmerge()
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| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 567 LLT HalfTy, in split64BitValueForMapping() argument
569 assert(HalfTy.getSizeInBits() == 32); in split64BitValueForMapping()
571 Register LoLHS = MRI->createGenericVirtualRegister(HalfTy); in split64BitValueForMapping()
1039 LLT HalfTy = getHalfSizedType(DstTy); in applyMappingImpl() local
1062 setRegsToType(MRI, Src1Regs, HalfTy); in applyMappingImpl()
1068 setRegsToType(MRI, Src2Regs, HalfTy); in applyMappingImpl()
1070 setRegsToType(MRI, DefRegs, HalfTy); in applyMappingImpl()
1089 LLT HalfTy = getHalfSizedType(DstTy); in applyMappingImpl() local
1112 setRegsToType(MRI, Src0Regs, HalfTy); in applyMappingImpl()
1117 setRegsToType(MRI, Src1Regs, HalfTy); in applyMappingImpl()
[all …]
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| H A D | AMDGPURegisterBankInfo.h | 65 LLT HalfTy,
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
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| /dports/devel/llvm11/llvm-11.0.1.src/tools/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
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| /dports/devel/llvm10/llvm-10.0.1.src/tools/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *FloatTy, *DoubleTy; member
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| /dports/devel/llvm90/llvm-9.0.1.src/tools/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *FloatTy, *DoubleTy; member
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *FloatTy, *DoubleTy; member
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| /dports/devel/llvm80/llvm-8.0.1.src/tools/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 40 llvm::Type *HalfTy, *FloatTy, *DoubleTy; member
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| /dports/devel/llvm70/llvm-7.0.1.src/tools/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 40 llvm::Type *HalfTy, *FloatTy, *DoubleTy; in CodeGenTBAA()
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
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| /dports/devel/llvm12/llvm-project-12.0.1.src/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
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| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
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| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
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| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
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| /dports/devel/llvm13/llvm-project-13.0.1.src/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
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| /dports/lang/clang-mesa/clang-13.0.1.src/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/clang/lib/CodeGen/ |
| H A D | CodeGenTypeCache.h | 39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
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| /dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3088 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant()
3098 LLT NVT = HalfTy; in narrowScalarShiftByConstant()
3099 unsigned NVTBits = HalfTy.getSizeInBits(); in narrowScalarShiftByConstant()
3198 const LLT HalfTy = LLT::scalar(NewBitSize); in narrowScalarShift() local
3227 auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt); in narrowScalarShift()
3230 auto HiOr = MIRBuilder.buildShl(HalfTy, InH, Amt); in narrowScalarShift()
3231 auto HiS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift()
3239 HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL)); in narrowScalarShift()
3250 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt); in narrowScalarShift()
3252 auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift()
[all …]
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3088 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant()
3098 LLT NVT = HalfTy; in narrowScalarShiftByConstant()
3099 unsigned NVTBits = HalfTy.getSizeInBits(); in narrowScalarShiftByConstant()
3198 const LLT HalfTy = LLT::scalar(NewBitSize); in narrowScalarShift() local
3227 auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt); in narrowScalarShift()
3230 auto HiOr = MIRBuilder.buildShl(HalfTy, InH, Amt); in narrowScalarShift()
3231 auto HiS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift()
3239 HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL)); in narrowScalarShift()
3250 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt); in narrowScalarShift()
3252 auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift()
[all …]
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3088 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant()
3098 LLT NVT = HalfTy; in narrowScalarShiftByConstant()
3099 unsigned NVTBits = HalfTy.getSizeInBits(); in narrowScalarShiftByConstant()
3198 const LLT HalfTy = LLT::scalar(NewBitSize); in narrowScalarShift() local
3227 auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt); in narrowScalarShift()
3230 auto HiOr = MIRBuilder.buildShl(HalfTy, InH, Amt); in narrowScalarShift()
3231 auto HiS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift()
3239 HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL)); in narrowScalarShift()
3250 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt); in narrowScalarShift()
3252 auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift()
[all …]
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