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Searched refs:ICH9_LPC_PIC_NUM_PINS (Results 1 – 18 of 18) sorted by relevance

/dports/emulators/qemu42/qemu-4.2.1/hw/isa/
H A Dlpc_ich9.c214 assert(gsi < ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_pic()
236 return pirq + ICH9_LPC_PIC_NUM_PINS; in ich9_pirq_to_gsi()
241 return gsi - ICH9_LPC_PIC_NUM_PINS; in ich9_gsi_to_pirq()
249 assert(gsi >= ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_apic()
299 if (pic_irq < ICH9_LPC_PIC_NUM_PINS) { in ich9_route_intx_pin_to_irq()
355 if (irq >= ICH9_LPC_PIC_NUM_PINS) { in ich9_set_sci()
/dports/emulators/qemu/qemu-6.2.0/hw/isa/
H A Dlpc_ich9.c212 assert(gsi < ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_pic()
234 return pirq + ICH9_LPC_PIC_NUM_PINS; in ich9_pirq_to_gsi()
239 return gsi - ICH9_LPC_PIC_NUM_PINS; in ich9_gsi_to_pirq()
247 assert(gsi >= ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_apic()
297 if (pic_irq < ICH9_LPC_PIC_NUM_PINS) { in ich9_route_intx_pin_to_irq()
357 if (irq >= ICH9_LPC_PIC_NUM_PINS) { in ich9_set_sci()
/dports/emulators/qemu60/qemu-6.0.0/hw/isa/
H A Dlpc_ich9.c213 assert(gsi < ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_pic()
235 return pirq + ICH9_LPC_PIC_NUM_PINS; in ich9_pirq_to_gsi()
240 return gsi - ICH9_LPC_PIC_NUM_PINS; in ich9_gsi_to_pirq()
248 assert(gsi >= ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_apic()
298 if (pic_irq < ICH9_LPC_PIC_NUM_PINS) { in ich9_route_intx_pin_to_irq()
358 if (irq >= ICH9_LPC_PIC_NUM_PINS) { in ich9_set_sci()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/isa/
H A Dlpc_ich9.c211 assert(gsi < ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_pic()
233 return pirq + ICH9_LPC_PIC_NUM_PINS; in ich9_pirq_to_gsi()
238 return gsi - ICH9_LPC_PIC_NUM_PINS; in ich9_gsi_to_pirq()
246 assert(gsi >= ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_apic()
296 if (pic_irq < ICH9_LPC_PIC_NUM_PINS) { in ich9_route_intx_pin_to_irq()
352 if (irq >= ICH9_LPC_PIC_NUM_PINS) { in ich9_set_sci()
/dports/emulators/qemu5/qemu-5.2.0/hw/isa/
H A Dlpc_ich9.c213 assert(gsi < ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_pic()
235 return pirq + ICH9_LPC_PIC_NUM_PINS; in ich9_pirq_to_gsi()
240 return gsi - ICH9_LPC_PIC_NUM_PINS; in ich9_gsi_to_pirq()
248 assert(gsi >= ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_apic()
298 if (pic_irq < ICH9_LPC_PIC_NUM_PINS) { in ich9_route_intx_pin_to_irq()
358 if (irq >= ICH9_LPC_PIC_NUM_PINS) { in ich9_set_sci()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/isa/
H A Dlpc_ich9.c214 assert(gsi < ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_pic()
236 return pirq + ICH9_LPC_PIC_NUM_PINS; in ich9_pirq_to_gsi()
241 return gsi - ICH9_LPC_PIC_NUM_PINS; in ich9_gsi_to_pirq()
249 assert(gsi >= ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_apic()
299 if (pic_irq < ICH9_LPC_PIC_NUM_PINS) { in ich9_route_intx_pin_to_irq()
355 if (irq >= ICH9_LPC_PIC_NUM_PINS) { in ich9_set_sci()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/isa/
H A Dlpc_ich9.c212 assert(gsi < ICH9_LPC_PIC_NUM_PINS);
234 return pirq + ICH9_LPC_PIC_NUM_PINS;
239 return gsi - ICH9_LPC_PIC_NUM_PINS;
247 assert(gsi >= ICH9_LPC_PIC_NUM_PINS);
297 if (pic_irq < ICH9_LPC_PIC_NUM_PINS) {
353 if (irq >= ICH9_LPC_PIC_NUM_PINS) {
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/isa/
H A Dlpc_ich9.c212 assert(gsi < ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_pic()
234 return pirq + ICH9_LPC_PIC_NUM_PINS; in ich9_pirq_to_gsi()
239 return gsi - ICH9_LPC_PIC_NUM_PINS; in ich9_gsi_to_pirq()
247 assert(gsi >= ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_apic()
297 if (pic_irq < ICH9_LPC_PIC_NUM_PINS) { in ich9_route_intx_pin_to_irq()
357 if (irq >= ICH9_LPC_PIC_NUM_PINS) { in ich9_set_sci()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/isa/
H A Dlpc_ich9.c212 assert(gsi < ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_pic()
234 return pirq + ICH9_LPC_PIC_NUM_PINS; in ich9_pirq_to_gsi()
239 return gsi - ICH9_LPC_PIC_NUM_PINS; in ich9_gsi_to_pirq()
247 assert(gsi >= ICH9_LPC_PIC_NUM_PINS); in ich9_lpc_update_apic()
297 if (pic_irq < ICH9_LPC_PIC_NUM_PINS) { in ich9_route_intx_pin_to_irq()
353 if (irq >= ICH9_LPC_PIC_NUM_PINS) { in ich9_set_sci()
/dports/emulators/qemu/qemu-6.2.0/include/hw/i386/
H A Dich9.h183 #define ICH9_LPC_PIC_NUM_PINS 16 macro
/dports/emulators/qemu60/qemu-6.0.0/include/hw/i386/
H A Dich9.h183 #define ICH9_LPC_PIC_NUM_PINS 16 macro
/dports/emulators/qemu5/qemu-5.2.0/include/hw/i386/
H A Dich9.h183 #define ICH9_LPC_PIC_NUM_PINS 16 macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/i386/
H A Dich9.h183 #define ICH9_LPC_PIC_NUM_PINS 16
/dports/emulators/qemu42/qemu-4.2.1/include/hw/i386/
H A Dich9.h183 #define ICH9_LPC_PIC_NUM_PINS 16 macro
/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/i386/
H A Dich9.h183 #define ICH9_LPC_PIC_NUM_PINS 16 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/i386/
H A Dich9.h186 #define ICH9_LPC_PIC_NUM_PINS 16 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/i386/
H A Dich9.h182 #define ICH9_LPC_PIC_NUM_PINS 16
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/i386/
H A Dich9.h182 #define ICH9_LPC_PIC_NUM_PINS 16 macro