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Searched refs:ICH9_PMIO_SMI_EN (Results 1 – 25 of 48) sorted by relevance

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/dports/emulators/qemu60/qemu-6.0.0/roms/seabios-hppa/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/emulators/qemu60/qemu-6.0.0/roms/seabios/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/emulators/qemu5/qemu-5.2.0/roms/seabios/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/seabios-hppa/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/seabios/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/seabios-hppa/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/seabios/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/misc/seabios/seabios-1.14.0/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/emulators/qemu42/qemu-4.2.1/roms/seabios-hppa/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/emulators/qemu42/qemu-4.2.1/roms/seabios/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/seabios-hppa/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
H A Dsmm.c209 u32 value = inl(acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
220 acpi_pm_base + ICH9_PMIO_SMI_EN); in ich9_lpc_apmc_smm_setup()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/seabios/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/seabios-hppa/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
/dports/emulators/qemu/qemu-6.2.0/roms/seabios/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro
/dports/emulators/qemu/qemu-6.2.0/roms/seabios-hppa/src/fw/
H A Ddev-q35.h44 #define ICH9_PMIO_SMI_EN 0x30 macro

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