/dports/devel/asl/asl-current/include/ |
H A D | regh16.inc | 117 IE0 ds.b 1 ; Interrupt enable register 0 118 TXINTE bit #7,IE0 ; TXINT Interrupt Enable 119 RXINTE bit #6,IE0 ; RXINT Interrupt Enable 120 TXRDYE bit #1,IE0 ; TXRDY Interrupt Enable 121 RXRDYE bit #0,IE0 ; RXRDY Interrupt Enable
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/dports/science/dalton/dalton-66052b3af5ea7225e31178bf9a8b031913c72190/DALTON/cc/ |
H A D | cc_etadrv.F | 636 INTEGER IE0(MXSTAT), IE1(MXORD,MXSTAT), ISYMS(MXSTAT) local 674 IE0(IDXS) = ISTAT(IVEC,IDXS) 784 I0GTRAN(1,N0GTRAN) = IE0(1) 829 I1FTRAN(1,N1FTRAN) = IE0(1) 844 I1FTRAN(1,N1FTRAN) = IE0(1) 910 I0FATRAN(1,N0FATRAN) = IE0(1) 917 I0FATRAN(1,N0FATRAN) = IE0(1) 1014 IXETRAN(2,NEATRAN) = IE0(1)
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H A D | cc_etadrv1.F | 598 INTEGER IE0(MXSTAT), IE1(MXORD,MXSTAT), ISYMS(MXSTAT) local 642 IE0(IDXS) = ISTAT(IVEC,IDXS) 783 I0GTRAN(1,N0GTRAN) = IE0(1) 828 I1FTRAN(1,N1FTRAN) = IE0(1) 844 I1FTRAN(1,N1FTRAN) = IE0(1) 910 I0FATRAN(1,N0FATRAN) = IE0(1) 917 I0FATRAN(1,N0FATRAN) = IE0(1) 1010 IEATRAN(2,NEATRAN) = IE0(1)
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/dports/devel/asl/asl-current/tests/t_mic51/ |
H A D | defint.inc | 92 CLR IE0 138 CLR IE0
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/dports/science/frontistr/FrontISTR-c66bdc397de319ca59a0565b3f3b1a3b33f0c50c/hecmw1/src/operations/adaptation/ |
H A D | hecmw_adapt_edge_comm_table.f90 | 196 call hecmw_adapt_EDGE_INFO (hecMESH, inC1,inC2,IE0,1) 197 wiEb(k)= IE0
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/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/ |
H A D | IdeData.h | 298 #define IE0 BIT1 macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/ |
H A D | IdeData.h | 298 #define IE0 BIT1 macro
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/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/ |
H A D | IdeData.h | 304 #define IE0 BIT1 macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/ |
H A D | IdeData.h | 298 #define IE0 BIT1 macro
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/dports/lang/erlang-runtime23/otp-OTP-23.3.4.10/lib/public_key/test/pkits_SUITE_data/pkits/smime-pem/ |
H A D | InvalidonlySomeReasonsTest16EE.pem | 15 IE0+WL2hbMDCOcfswi0ErEjBAhLglYqzuCb8r4md8jbkn5G1slSeR81NEpBoB/RJ
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/dports/lang/erlang-runtime24/otp-OTP-24.1.7/lib/public_key/test/pkits_SUITE_data/pkits/smime-pem/ |
H A D | InvalidonlySomeReasonsTest16EE.pem | 15 IE0+WL2hbMDCOcfswi0ErEjBAhLglYqzuCb8r4md8jbkn5G1slSeR81NEpBoB/RJ
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/dports/lang/erlang-runtime22/otp-OTP-22.3.4.24/lib/public_key/test/pkits_SUITE_data/pkits/smime-pem/ |
H A D | InvalidonlySomeReasonsTest16EE.pem | 15 IE0+WL2hbMDCOcfswi0ErEjBAhLglYqzuCb8r4md8jbkn5G1slSeR81NEpBoB/RJ
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/dports/lang/erlang-wx/otp-OTP-24.1.7/lib/public_key/test/pkits_SUITE_data/pkits/smime-pem/ |
H A D | InvalidonlySomeReasonsTest16EE.pem | 15 IE0+WL2hbMDCOcfswi0ErEjBAhLglYqzuCb8r4md8jbkn5G1slSeR81NEpBoB/RJ
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/dports/lang/erlang/otp-OTP-24.1.7/lib/public_key/test/pkits_SUITE_data/pkits/smime-pem/ |
H A D | InvalidonlySomeReasonsTest16EE.pem | 15 IE0+WL2hbMDCOcfswi0ErEjBAhLglYqzuCb8r4md8jbkn5G1slSeR81NEpBoB/RJ
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/dports/lang/erlang-runtime21/otp-OTP-21.3.8.24/lib/public_key/test/pkits_SUITE_data/pkits/smime-pem/ |
H A D | InvalidonlySomeReasonsTest16EE.pem | 15 IE0+WL2hbMDCOcfswi0ErEjBAhLglYqzuCb8r4md8jbkn5G1slSeR81NEpBoB/RJ
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/dports/lang/erlang-java/otp-OTP-24.1.7/lib/public_key/test/pkits_SUITE_data/pkits/smime-pem/ |
H A D | InvalidonlySomeReasonsTest16EE.pem | 15 IE0+WL2hbMDCOcfswi0ErEjBAhLglYqzuCb8r4md8jbkn5G1slSeR81NEpBoB/RJ
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/wan/ |
H A D | c101.c | 197 sca_out(IE0_TXINT, MSCI0_OFFSET + IE0, port); in c101_open() 203 sca_out(IE0_RXINTA, MSCI1_OFFSET + IE0, port); in c101_open()
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H A D | hd64570.h | 55 #define IE0 0x08 /* Interrupt Enable 0 */ macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/wan/ |
H A D | c101.c | 197 sca_out(IE0_TXINT, MSCI0_OFFSET + IE0, port); in c101_open() 203 sca_out(IE0_RXINTA, MSCI1_OFFSET + IE0, port); in c101_open()
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H A D | hd64570.h | 55 #define IE0 0x08 /* Interrupt Enable 0 */ macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/wan/ |
H A D | c101.c | 197 sca_out(IE0_TXINT, MSCI0_OFFSET + IE0, port); in c101_open() 203 sca_out(IE0_RXINTA, MSCI1_OFFSET + IE0, port); in c101_open()
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H A D | hd64570.h | 55 #define IE0 0x08 /* Interrupt Enable 0 */ macro
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/dports/lang/sdcc/sdcc-4.0.0/sim/ucsim/s51.src/ |
H A D | regs51.h | 84 #define IE0 0xa8 /* */ macro
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/dports/comms/limesuite/LimeSuite-20.10.0/mcu_program/mcu_src/ |
H A D | LMS7002_REGx51.h | 82 sbit IE0 = 0x89; variable
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/dports/devel/tpasm/tpasm1.11/include/ |
H A D | 8051.inc | 65 IE0 EQU 089H
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