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Searched refs:IL49_SCD_START_OFFSET (Results 1 – 3 of 3) sorted by relevance

/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/wireless/intel/iwlegacy/
H A Dprph.h328 #define IL49_SCD_START_OFFSET 0xa02c00 macro
334 #define IL49_SCD_SRAM_BASE_ADDR (IL49_SCD_START_OFFSET + 0x0)
345 #define IL49_SCD_EMPTY_BITS (IL49_SCD_START_OFFSET + 0x4)
357 #define IL49_SCD_DRAM_BASE_ADDR (IL49_SCD_START_OFFSET + 0x10)
366 #define IL49_SCD_TXFACT (IL49_SCD_START_OFFSET + 0x1c)
374 #define IL49_SCD_QUEUE_WRPTR(x) (IL49_SCD_START_OFFSET + 0x24 + (x) * 4)
382 #define IL49_SCD_QUEUE_RDPTR(x) (IL49_SCD_START_OFFSET + 0x64 + (x) * 4)
393 #define IL49_SCD_QUEUECHAIN_SEL (IL49_SCD_START_OFFSET + 0xd0)
404 #define IL49_SCD_INTERRUPT_MASK (IL49_SCD_START_OFFSET + 0xe4)
426 (IL49_SCD_START_OFFSET + 0x104 + (x) * 4)
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/wireless/intel/iwlegacy/
H A Dprph.h328 #define IL49_SCD_START_OFFSET 0xa02c00 macro
334 #define IL49_SCD_SRAM_BASE_ADDR (IL49_SCD_START_OFFSET + 0x0)
345 #define IL49_SCD_EMPTY_BITS (IL49_SCD_START_OFFSET + 0x4)
357 #define IL49_SCD_DRAM_BASE_ADDR (IL49_SCD_START_OFFSET + 0x10)
366 #define IL49_SCD_TXFACT (IL49_SCD_START_OFFSET + 0x1c)
374 #define IL49_SCD_QUEUE_WRPTR(x) (IL49_SCD_START_OFFSET + 0x24 + (x) * 4)
382 #define IL49_SCD_QUEUE_RDPTR(x) (IL49_SCD_START_OFFSET + 0x64 + (x) * 4)
393 #define IL49_SCD_QUEUECHAIN_SEL (IL49_SCD_START_OFFSET + 0xd0)
404 #define IL49_SCD_INTERRUPT_MASK (IL49_SCD_START_OFFSET + 0xe4)
426 (IL49_SCD_START_OFFSET + 0x104 + (x) * 4)
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/wireless/intel/iwlegacy/
H A Dprph.h328 #define IL49_SCD_START_OFFSET 0xa02c00 macro
334 #define IL49_SCD_SRAM_BASE_ADDR (IL49_SCD_START_OFFSET + 0x0)
345 #define IL49_SCD_EMPTY_BITS (IL49_SCD_START_OFFSET + 0x4)
357 #define IL49_SCD_DRAM_BASE_ADDR (IL49_SCD_START_OFFSET + 0x10)
366 #define IL49_SCD_TXFACT (IL49_SCD_START_OFFSET + 0x1c)
374 #define IL49_SCD_QUEUE_WRPTR(x) (IL49_SCD_START_OFFSET + 0x24 + (x) * 4)
382 #define IL49_SCD_QUEUE_RDPTR(x) (IL49_SCD_START_OFFSET + 0x64 + (x) * 4)
393 #define IL49_SCD_QUEUECHAIN_SEL (IL49_SCD_START_OFFSET + 0xd0)
404 #define IL49_SCD_INTERRUPT_MASK (IL49_SCD_START_OFFSET + 0xe4)
426 (IL49_SCD_START_OFFSET + 0x104 + (x) * 4)