/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 48 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 108 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 109 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 110 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 111 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 112 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 113 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 114 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 115 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 116 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 51 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 111 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 112 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 113 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 114 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 115 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 116 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 117 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 118 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 119 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 48 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 108 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 109 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 110 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 111 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 112 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 113 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 114 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 115 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 116 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 51 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 111 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 112 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 113 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 114 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 115 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 116 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 117 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 118 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 119 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 48 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 108 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 109 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 110 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 111 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 112 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 113 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 114 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 115 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 116 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 48 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 108 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 109 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 110 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 111 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 112 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 113 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 114 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 115 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 116 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 48 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 108 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 109 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 110 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 111 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 112 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 113 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 114 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 115 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 116 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 51 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 111 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 112 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 113 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 114 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 115 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 116 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 117 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 118 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 119 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 51 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 111 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 112 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 113 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 114 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 115 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 116 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 117 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 118 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 119 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 48 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 108 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 109 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 110 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 111 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 112 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 113 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 114 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 115 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 116 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 51 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 111 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 112 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 113 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 114 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 115 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 116 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 117 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 118 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 119 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 48 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 108 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 109 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 110 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 111 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 112 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 113 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 114 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 115 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 116 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/include/asm/arch-imx/ |
H A D | imx-regs.h | 51 #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) macro 111 #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) 112 #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) 113 #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) 114 #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) 115 #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) 116 #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) 117 #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) 118 #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) 119 #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) [all …]
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/dports/devel/openocd/openocd-0.11.0/src/jtag/drivers/ |
H A D | imx_gpio.c | 30 #define IMX_GPIO_BASE 0x0209c000 macro 34 static uint32_t imx_gpio_peri_base = IMX_GPIO_BASE;
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/armadeus/apf27/ |
H A D | apf27.c | 65 struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE; in apf27_port_init()
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/armadeus/apf27/ |
H A D | apf27.c | 65 struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE; in apf27_port_init()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/armadeus/apf27/ |
H A D | apf27.c | 65 struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE; in apf27_port_init()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/armadeus/apf27/ |
H A D | apf27.c | 65 struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE; in apf27_port_init()
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/dports/sysutils/u-boot-tools/u-boot-2020.07/board/armadeus/apf27/ |
H A D | apf27.c | 66 struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE; in apf27_port_init()
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/armadeus/apf27/ |
H A D | apf27.c | 66 struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE; in apf27_port_init()
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/armadeus/apf27/ |
H A D | apf27.c | 65 struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE; in apf27_port_init()
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/cpu/arm926ejs/mx27/ |
H A D | generic.c | 207 struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE; in imx_gpio_mode()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/mx27/ |
H A D | generic.c | 195 struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE; in imx_gpio_mode()
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/cpu/arm926ejs/mx27/ |
H A D | generic.c | 207 struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE; in imx_gpio_mode()
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/mx27/ |
H A D | generic.c | 195 struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE; in imx_gpio_mode()
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