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Searched refs:INSN_4111 (Results 1 – 25 of 64) sorted by relevance

123

/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dmips.h429 #define INSN_4111 0x00400000
498 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/opcode/
H A Dmips.h438 #define INSN_4111 0x00400000 macro
509 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dmips.h429 #define INSN_4111 0x00400000 macro
498 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/include/opcode/
H A Dmips.h543 #define INSN_4111 0x00400000 macro
635 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
/dports/devel/djgpp-binutils/binutils-2.17/include/opcode/
H A Dmips.h496 #define INSN_4111 0x00400000 macro
569 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
/dports/devel/avr-gdb/gdb-7.3.1/include/opcode/
H A Dmips.h607 #define INSN_4111 0x00400000 macro
708 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
/dports/devel/gdb761/gdb-7.6.1/include/opcode/
H A Dmips.h754 #define INSN_4111 0x00400000 macro
870 return (mask & INSN_4111) != 0; in cpu_is_member()
/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/include/opcode/
H A Dmips.h1120 #define INSN_4111 0x00400000 macro
1249 return (mask & INSN_4111) != 0; in cpu_is_member()
/dports/devel/binutils/binutils-2.37/include/opcode/
H A Dmips.h1252 #define INSN_4111 0x00400000 macro
1424 return (mask & INSN_4111) != 0; in cpu_is_member()
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/include/opcode/
H A Dmips.h1221 #define INSN_4111 0x00400000 macro
1366 return (mask & INSN_4111) != 0; in cpu_is_member()
/dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/
H A Dmips.h1252 #define INSN_4111 0x00400000 macro
1424 return (mask & INSN_4111) != 0; in cpu_is_member()
/dports/devel/gnulibiberty/binutils-2.37/include/opcode/
H A Dmips.h1252 #define INSN_4111 0x00400000 macro
1424 return (mask & INSN_4111) != 0; in cpu_is_member()
/dports/lang/gnatdroid-binutils/binutils-2.27/include/opcode/
H A Dmips.h1221 #define INSN_4111 0x00400000 macro
1366 return (mask & INSN_4111) != 0; in cpu_is_member()
/dports/devel/gdb/gdb-11.1/include/opcode/
H A Dmips.h1252 #define INSN_4111 0x00400000 macro
1424 return (mask & INSN_4111) != 0; in cpu_is_member()
/dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/
H A Dmips.h1244 #define INSN_4111 0x00400000 macro
1400 return (mask & INSN_4111) != 0; in cpu_is_member()
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dmips-opc.c103 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
107 #define N411 INSN_4111
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dmips-opc.c103 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
107 #define N411 INSN_4111
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dmips-opc.c103 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
107 #define N411 INSN_4111
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dmips-dis.c551 #define INSN_4111 0x00400000 macro
631 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
1134 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
1138 #define N411 INSN_4111
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dmips-opc.c103 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
107 #define N411 INSN_4111
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dmips.c587 #define INSN_4111 0x00400000 macro
679 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
1187 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
1191 #define N411 INSN_4111
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dmips.c587 #define INSN_4111 0x00400000 macro
679 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
1187 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
1191 #define N411 INSN_4111
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dmips.c587 #define INSN_4111 0x00400000 macro
679 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
1187 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
1191 #define N411 INSN_4111
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dmips.c587 #define INSN_4111 0x00400000 macro
679 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
1187 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
1191 #define N411 INSN_4111
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dmips.c587 #define INSN_4111 0x00400000 macro
679 || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
1187 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
1191 #define N411 INSN_4111

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