Home
last modified time | relevance | path

Searched refs:INSN_MIPS16 (Results 1 – 25 of 64) sorted by relevance

123

/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dmips-dis.c369 ISA_MIPS32 | INSN_MIPS16,
375 ISA_MIPS32R2 | INSN_MIPS16,
382 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
388 ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
401 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dmips-dis.c369 ISA_MIPS32 | INSN_MIPS16,
375 ISA_MIPS32R2 | INSN_MIPS16,
382 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
388 ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
401 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dmips-dis.c369 ISA_MIPS32 | INSN_MIPS16,
375 ISA_MIPS32R2 | INSN_MIPS16,
382 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
388 ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
401 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/mips/gnu/
H A Dmips-dis.c401 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
407 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
415 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
421 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
445 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dmips-dis.c373 ISA_MIPS32 | INSN_MIPS16 | INSN_DSP,
379 ISA_MIPS32R2 | INSN_MIPS16 | INSN_DSP | INSN_MT,
386 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX | INSN_DSP,
392 ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX | INSN_DSP,
405 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/vmips/vmips-1.5.1/libopcodes_mips/
H A Dmips-dis.c415 *isa = ISA_MIPS3 | INSN_MIPS16;
432 *isa = ISA_MIPS32 | INSN_MIPS16;
437 *isa = ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX;
H A Dmips-opc.c90 #define I16 INSN_MIPS16
/dports/emulators/vmips/vmips-1.5.1/libopcodes_mips/opcode/
H A Dmips.h345 #define INSN_MIPS16 0x00002000 macro
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dmips.h408 #define INSN_MIPS16 0x00002000
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/opcode/
H A Dmips.h417 #define INSN_MIPS16 0x00002000 macro
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dmips.h408 #define INSN_MIPS16 0x00002000 macro
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/include/opcode/
H A Dmips.h526 #define INSN_MIPS16 0x00004000 macro
/dports/devel/djgpp-binutils/binutils-2.17/include/opcode/
H A Dmips.h475 #define INSN_MIPS16 0x00002000 macro
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dmips-dis.c532 #define INSN_MIPS16 0x00004000 macro
1121 #define I16 INSN_MIPS16
3143 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
3149 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
3157 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3163 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
3177 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dmips.c568 #define INSN_MIPS16 0x00004000 macro
1171 #define I16 INSN_MIPS16
3942 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
3948 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
3956 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3962 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
3976 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dmips.c568 #define INSN_MIPS16 0x00004000 macro
1171 #define I16 INSN_MIPS16
3932 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
3938 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
3946 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3952 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
3966 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dmips.c568 #define INSN_MIPS16 0x00004000 macro
1171 #define I16 INSN_MIPS16
3942 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
3948 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
3956 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3962 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
3976 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dmips.c568 #define INSN_MIPS16 0x00004000 macro
1171 #define I16 INSN_MIPS16
3932 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
3938 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
3946 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3952 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
3966 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dmips.c568 #define INSN_MIPS16 0x00004000 macro
1171 #define I16 INSN_MIPS16
3942 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
3948 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
3956 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3962 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
3976 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dmips.c568 #define INSN_MIPS16 0x00004000 macro
1171 #define I16 INSN_MIPS16
3932 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
3938 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
3946 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3952 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
3966 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/
H A Dmips.c568 #define INSN_MIPS16 0x00004000
1171 #define I16 INSN_MIPS16
3942 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
3948 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
3956 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3962 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
3976 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/
H A Dmips.c568 #define INSN_MIPS16 0x00004000 macro
1171 #define I16 INSN_MIPS16
3942 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
3948 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
3956 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3962 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
3976 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Dmips.c579 #define INSN_MIPS16 0x00004000 macro
1182 #define I16 INSN_MIPS16
4165 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
4171 (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
4179 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
4185 (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
4199 { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A DChangeLog-2010592 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/
H A DChangeLog-2010592 * mips-dis.c (mips_arch): Remove INSN_MIPS16.

123