| /dports/lang/polyml/polyml-5.8.2/mlsource/MLCompiler/CodeTree/X86Code/ |
| H A D | ml_bind.ML | 49 structure INTSET = IntSet
55 structure INTSET = IntSet
62 structure INTSET = IntSet
69 structure INTSET = IntSet
81 structure INTSET = IntSet
90 structure INTSET = IntSet
106 structure INTSET = IntSet
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/xtensa/ |
| H A D | pic_cpu.c | 38 uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE]; in check_interrupts()
52 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
71 env->sregs[INTSET] |= irq_bit; in xtensa_set_irq()
73 env->sregs[INTSET] &= ~irq_bit; in xtensa_set_irq()
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| /dports/emulators/qemu42/qemu-4.2.1/hw/xtensa/ |
| H A D | pic_cpu.c | 38 uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE]; in check_interrupts()
52 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
71 atomic_or(&env->sregs[INTSET], irq_bit); in xtensa_set_irq()
73 atomic_and(&env->sregs[INTSET], ~irq_bit); in xtensa_set_irq()
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| /dports/emulators/qemu-utils/qemu-4.2.1/hw/xtensa/ |
| H A D | pic_cpu.c | 38 uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE]; in check_interrupts()
52 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
71 atomic_or(&env->sregs[INTSET], irq_bit); in xtensa_set_irq()
73 atomic_and(&env->sregs[INTSET], ~irq_bit); in xtensa_set_irq()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/xtensa/ |
| H A D | pic_cpu.c | 38 uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE]; in check_interrupts()
52 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
71 atomic_or(&env->sregs[INTSET], irq_bit); in xtensa_set_irq()
73 atomic_and(&env->sregs[INTSET], ~irq_bit); in xtensa_set_irq()
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/xtensa/ |
| H A D | pic_cpu.c | 38 uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE]; in check_interrupts()
52 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
71 atomic_or(&env->sregs[INTSET], irq_bit); in xtensa_set_irq()
73 atomic_and(&env->sregs[INTSET], ~irq_bit); in xtensa_set_irq()
|
| /dports/emulators/qemu/qemu-6.2.0/hw/xtensa/ |
| H A D | pic_cpu.c | 38 uint32_t int_set_enabled = env->sregs[INTSET] & in check_interrupts()
56 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
75 qatomic_or(&env->sregs[INTSET], irq_bit); in xtensa_set_irq()
77 qatomic_and(&env->sregs[INTSET], ~irq_bit); in xtensa_set_irq()
|
| /dports/emulators/qemu60/qemu-6.0.0/hw/xtensa/ |
| H A D | pic_cpu.c | 38 uint32_t int_set_enabled = env->sregs[INTSET] & in check_interrupts()
56 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
75 qatomic_or(&env->sregs[INTSET], irq_bit); in xtensa_set_irq()
77 qatomic_and(&env->sregs[INTSET], ~irq_bit); in xtensa_set_irq()
|
| /dports/emulators/qemu5/qemu-5.2.0/hw/xtensa/ |
| H A D | pic_cpu.c | 38 uint32_t int_set_enabled = env->sregs[INTSET] & in check_interrupts()
56 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
75 qatomic_or(&env->sregs[INTSET], irq_bit); in xtensa_set_irq()
77 qatomic_and(&env->sregs[INTSET], ~irq_bit); in xtensa_set_irq()
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/xtensa/ |
| H A D | pic_cpu.c | 38 uint32_t int_set_enabled = env->sregs[INTSET] & in check_interrupts()
56 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
75 qatomic_or(&env->sregs[INTSET], irq_bit); in xtensa_set_irq()
77 qatomic_and(&env->sregs[INTSET], ~irq_bit); in xtensa_set_irq()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/target/xtensa/ |
| H A D | exc_helper.c | 131 atomic_or(&env->sregs[INTSET], in HELPER()
137 atomic_and(&env->sregs[INTSET], in HELPER()
165 env->sregs[INTSET] & in handle_interrupt()
212 env->sregs[INTSET], env->sregs[INTENABLE], in xtensa_cpu_do_interrupt()
|
| /dports/emulators/qemu5/qemu-5.2.0/target/xtensa/ |
| H A D | exc_helper.c | 131 qatomic_or(&env->sregs[INTSET], in HELPER()
137 qatomic_and(&env->sregs[INTSET], ~v); in intclear()
169 env->sregs[INTSET] & env->sregs[INTENABLE])) || in handle_interrupt()
219 env->sregs[INTSET], env->sregs[INTENABLE], in xtensa_cpu_do_interrupt()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/xtensa/ |
| H A D | exc_helper.c | 131 atomic_or(&env->sregs[INTSET], in HELPER()
137 atomic_and(&env->sregs[INTSET], in HELPER()
165 env->sregs[INTSET] & in handle_interrupt()
212 env->sregs[INTSET], env->sregs[INTENABLE], in xtensa_cpu_do_interrupt()
|
| /dports/emulators/qemu42/qemu-4.2.1/target/xtensa/ |
| H A D | exc_helper.c | 131 atomic_or(&env->sregs[INTSET], in HELPER()
137 atomic_and(&env->sregs[INTSET], in HELPER()
165 env->sregs[INTSET] & in handle_interrupt()
212 env->sregs[INTSET], env->sregs[INTENABLE], in xtensa_cpu_do_interrupt()
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/xtensa/ |
| H A D | exc_helper.c | 131 atomic_or(&env->sregs[INTSET], in HELPER()
137 atomic_and(&env->sregs[INTSET], in HELPER()
165 env->sregs[INTSET] & in handle_interrupt()
212 env->sregs[INTSET], env->sregs[INTENABLE], in xtensa_cpu_do_interrupt()
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/xtensa/ |
| H A D | exc_helper.c | 128 qatomic_or(&env->sregs[INTSET],
134 qatomic_and(&env->sregs[INTSET], ~v);
166 env->sregs[INTSET] & env->sregs[INTENABLE])) ||
215 env->sregs[INTSET], env->sregs[INTENABLE],
|
| /dports/emulators/qemu/qemu-6.2.0/target/xtensa/ |
| H A D | exc_helper.c | 128 qatomic_or(&env->sregs[INTSET], in HELPER()
134 qatomic_and(&env->sregs[INTSET], ~v); in intclear()
166 env->sregs[INTSET] & env->sregs[INTENABLE])) || in handle_interrupt()
215 env->sregs[INTSET], env->sregs[INTENABLE], in xtensa_cpu_do_interrupt()
|
| /dports/emulators/qemu60/qemu-6.0.0/target/xtensa/ |
| H A D | exc_helper.c | 131 qatomic_or(&env->sregs[INTSET], in HELPER()
137 qatomic_and(&env->sregs[INTSET], ~v); in intclear()
169 env->sregs[INTSET] & env->sregs[INTENABLE])) || in handle_interrupt()
219 env->sregs[INTSET], env->sregs[INTENABLE], in xtensa_cpu_do_interrupt()
|
| /dports/math/gretl/gretl-2021d/gui/ |
| H A D | settings.c | 336 INVISET | INTSET, 0, TAB_NONE, NULL },
338 INVISET | INTSET, 0, TAB_NONE, NULL },
340 INVISET | INTSET, 0, TAB_NONE, NULL },
342 INVISET | INTSET, 0, TAB_NONE, NULL },
344 INVISET | INTSET, 0, TAB_NONE, NULL },
1853 if (rc->flags & INTSET) { in make_prefs_tab()
2079 if (rcvar->flags & INTSET) { in apply_prefs_changes()
2191 } else if (rcvar->flags & INTSET) { in write_rc()
2385 } else if (rcvar->flags & INTSET) { in find_and_set_rc_var()
2611 } else if (rcvar->flags & INTSET) { in read_win32_config()
[all …]
|
| /dports/devel/cc65/cc65-2.19/libsrc/lynx/ |
| H A D | irq.s | 40 lda INTSET
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/xtensa/include/asm/ |
| H A D | regs.h | 18 #define INTSET 226 macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/xtensa/include/asm/ |
| H A D | regs.h | 18 #define INTSET 226 macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/xtensa/include/asm/ |
| H A D | regs.h | 18 #define INTSET 226 macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/xtensa/include/asm/ |
| H A D | regs.h | 18 #define INTSET 226 macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/xtensa/include/asm/ |
| H A D | regs.h | 18 #define INTSET 226 macro
|