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Searched refs:IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (Results 1 – 25 of 77) sorted by relevance

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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/freescale/mx31pdk/
H A Dlowlevel_init.S44 write32 IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/freescale/mx31pdk/
H A Dlowlevel_init.S44 write32 IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/freescale/mx31pdk/
H A Dlowlevel_init.S44 write32 IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/freescale/mx31pdk/
H A Dlowlevel_init.S44 write32 IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/freescale/mx31pdk/
H A Dlowlevel_init.S45 write32 IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
/dports/sysutils/u-boot-tools/u-boot-2020.07/board/freescale/mx31pdk/
H A Dlowlevel_init.S44 write32 IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/freescale/mx31pdk/
H A Dlowlevel_init.S44 write32 IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx31/
H A Dmx31-regs.h271 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx31/
H A Dmx31-regs.h271 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8)
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx31/
H A Dmx31-regs.h271 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx31/
H A Dmx31-regs.h271 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx31/
H A Dmx31-regs.h271 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx31/
H A Dmx31-regs.h271 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx31/
H A Dmx31-regs.h271 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h840 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h829 #define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) macro

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