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Searched refs:IREG (Results 1 – 25 of 94) sorted by relevance

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/dports/lang/mono/mono-5.10.1.57/mono/mini/
H A Dmini-ops.h357 MINI_OP(OP_IADD, "int_add", IREG, IREG, IREG)
358 MINI_OP(OP_ISUB, "int_sub", IREG, IREG, IREG)
365 MINI_OP(OP_IOR, "int_or", IREG, IREG, IREG)
660 MINI_OP(OP_MIN, "min", IREG, IREG, IREG)
661 MINI_OP(OP_MAX, "max", IREG, IREG, IREG)
663 MINI_OP(OP_IMIN, "int_min", IREG, IREG, IREG)
664 MINI_OP(OP_IMAX, "int_max", IREG, IREG, IREG)
669 MINI_OP(OP_ADC, "adc", IREG, IREG, IREG)
671 MINI_OP(OP_SBB, "sbb", IREG, IREG, IREG)
1016 MINI_OP3(OP_ATOMIC_CAS_I4, "atomic_cas_i4", IREG, IREG, IREG, IREG)
[all …]
/dports/games/libretro-mame2003_plus/mame2003-plus-libretro-17e9889/src/cpu/tms32031/
H A D32031ops.c885 IREG(reg) += IREG(TMR_IR0); in mod0a()
892 IREG(reg) -= IREG(TMR_IR0); in mod0b()
900 IREG(reg) += IREG(TMR_IR0); in mod0c()
908 IREG(reg) -= IREG(TMR_IR0); in mod0d()
952 IREG(reg) += IREG(TMR_IR1); in mod12()
959 IREG(reg) -= IREG(TMR_IR1); in mod13()
967 IREG(reg) += IREG(TMR_IR1); in mod14()
975 IREG(reg) -= IREG(TMR_IR1); in mod15()
4304 IREG(dreg) = IREG(OP & 31); in ldiu_reg()
4340 IREG(dreg) = IREG(OP & 31); in ldilo_reg()
[all …]
H A Dtms32031.c281 int validints = IREG(TMR_IF) & IREG(TMR_IE) & 0x07ff; in check_irqs()
317 IREG(TMR_IF) |= 1 << irqline; in tms32031_set_irq_line()
319 IREG(TMR_IF) &= ~(1 << irqline); in tms32031_set_irq_line()
395 IREG(TMR_IE) = 0; in tms32031_reset()
396 IREG(TMR_IF) = 0; in tms32031_reset()
397 IREG(TMR_ST) = 0; in tms32031_reset()
398 IREG(TMR_IOF) = 0; in tms32031_reset()
445 if ((IREG(TMR_ST) & RMFLAG) && tms32031.pc == IREG(TMR_RE)) in tms32031_execute()
449 if ((INT32)--IREG(TMR_RC) >= 0) in tms32031_execute()
450 tms32031.pc = IREG(TMR_RS); in tms32031_execute()
[all …]
/dports/games/libretro-mame2003/mame2003-libretro-4358db4/src/cpu/tms32031/
H A D32031ops.c885 IREG(reg) += IREG(TMR_IR0); in mod0a()
892 IREG(reg) -= IREG(TMR_IR0); in mod0b()
900 IREG(reg) += IREG(TMR_IR0); in mod0c()
908 IREG(reg) -= IREG(TMR_IR0); in mod0d()
952 IREG(reg) += IREG(TMR_IR1); in mod12()
959 IREG(reg) -= IREG(TMR_IR1); in mod13()
967 IREG(reg) += IREG(TMR_IR1); in mod14()
975 IREG(reg) -= IREG(TMR_IR1); in mod15()
4304 IREG(dreg) = IREG(OP & 31); in ldiu_reg()
4340 IREG(dreg) = IREG(OP & 31); in ldilo_reg()
[all …]
H A Dtms32031.c281 int validints = IREG(TMR_IF) & IREG(TMR_IE) & 0x07ff; in check_irqs()
317 IREG(TMR_IF) |= 1 << irqline; in tms32031_set_irq_line()
319 IREG(TMR_IF) &= ~(1 << irqline); in tms32031_set_irq_line()
395 IREG(TMR_IE) = 0; in tms32031_reset()
396 IREG(TMR_IF) = 0; in tms32031_reset()
397 IREG(TMR_ST) = 0; in tms32031_reset()
398 IREG(TMR_IOF) = 0; in tms32031_reset()
445 if ((IREG(TMR_ST) & RMFLAG) && tms32031.pc == IREG(TMR_RE)) in tms32031_execute()
449 if ((INT32)--IREG(TMR_RC) >= 0) in tms32031_execute()
450 tms32031.pc = IREG(TMR_RS); in tms32031_execute()
[all …]
/dports/emulators/mess/mame-mame0226/src/devices/cpu/tms32031/
H A D32031ops.hxx1028 IREG(reg) += IREG(TMR_IR0); in mod0a()
1035 IREG(reg) -= IREG(TMR_IR0); in mod0b()
1043 IREG(reg) += IREG(TMR_IR0); in mod0c()
1051 IREG(reg) -= IREG(TMR_IR0); in mod0d()
1095 IREG(reg) += IREG(TMR_IR1); in mod12()
1102 IREG(reg) -= IREG(TMR_IR1); in mod13()
1110 IREG(reg) += IREG(TMR_IR1); in mod14()
1118 IREG(reg) -= IREG(TMR_IR1); in mod15()
4538 IREG(dreg) = IREG(op & 31); in ldiu_reg()
4574 IREG(dreg) = IREG(op & 31); in ldilo_reg()
[all …]
H A Dtms32031.cpp579 IREG(TMR_IE) = 0; in device_reset()
580 IREG(TMR_IF) = 0; in device_reset()
581 IREG(TMR_ST) = 0; in device_reset()
582 IREG(TMR_IOF) = 0; in device_reset()
774 uint16_t validints = IREG(TMR_IF) & IREG(TMR_IE) & 0x0fff; in check_irqs()
794 IREG(TMR_IF) &= ~intmask; in check_irqs()
893 IREG(TMR_IF) |= intmask; in execute_set_input()
927 if ((IREG(TMR_ST) & RMFLAG) && m_pc == IREG(TMR_RE) + 1) in execute_run()
930 m_pc = IREG(TMR_RS); in execute_run()
959 if ((IREG(TMR_ST) & RMFLAG) && m_pc == IREG(TMR_RE) + 1) in execute_run()
[all …]
/dports/emulators/mame/mame-mame0226/src/devices/cpu/tms32031/
H A D32031ops.hxx1028 IREG(reg) += IREG(TMR_IR0); in mod0a()
1035 IREG(reg) -= IREG(TMR_IR0); in mod0b()
1043 IREG(reg) += IREG(TMR_IR0); in mod0c()
1051 IREG(reg) -= IREG(TMR_IR0); in mod0d()
1095 IREG(reg) += IREG(TMR_IR1); in mod12()
1102 IREG(reg) -= IREG(TMR_IR1); in mod13()
1110 IREG(reg) += IREG(TMR_IR1); in mod14()
1118 IREG(reg) -= IREG(TMR_IR1); in mod15()
4538 IREG(dreg) = IREG(op & 31); in ldiu_reg()
4574 IREG(dreg) = IREG(op & 31); in ldilo_reg()
[all …]
H A Dtms32031.cpp579 IREG(TMR_IE) = 0; in device_reset()
580 IREG(TMR_IF) = 0; in device_reset()
581 IREG(TMR_ST) = 0; in device_reset()
582 IREG(TMR_IOF) = 0; in device_reset()
774 uint16_t validints = IREG(TMR_IF) & IREG(TMR_IE) & 0x0fff; in check_irqs()
794 IREG(TMR_IF) &= ~intmask; in check_irqs()
893 IREG(TMR_IF) |= intmask; in execute_set_input()
927 if ((IREG(TMR_ST) & RMFLAG) && m_pc == IREG(TMR_RE) + 1) in execute_run()
930 m_pc = IREG(TMR_RS); in execute_run()
959 if ((IREG(TMR_ST) & RMFLAG) && m_pc == IREG(TMR_RE) + 1) in execute_run()
[all …]
/dports/lang/sbcl/sbcl-1.3.13/src/runtime/
H A Dsparc-lispregs.h19 #define IREG(num) %i##num macro
26 #define IREG(num) ((num)+24) macro
56 #define reg_FDEFN IREG(0)
57 #define reg_LEXENV IREG(1)
58 #define reg_L0 IREG(2)
59 #define reg_NFP IREG(3)
60 #define reg_CFUNC IREG(4)
61 #define reg_CODE IREG(5)
62 #define reg_LIP IREG(7)
/dports/lang/parrot/parrot-8.1.0/src/ops/
H A Dcore_ops.c15112 IREG(1) = (IREG(2) & IREG(3)); in Parrot_band_i_i_i()
15142 IREG(1) = (IREG(2) | IREG(3)); in Parrot_bor_i_i_i()
15278 IREG(1) = (IREG(2) ^ IREG(3)); in Parrot_bxor_i_i_i()
16292 IREG(1) = (IREG(2) < IREG(3)) ? (-1) : (IREG(2) > IREG(3)) ? (+1) : 0; in Parrot_cmp_i_i_i()
16539 IREG(1) = (IREG(2) <= IREG(3)); in Parrot_isle_i_i_i()
16791 IREG(1) = IREG(2) ? IREG(3) : IREG(2); in Parrot_and_i_i_i()
16846 IREG(1) = IREG(2) ? IREG(2) : IREG(3); in Parrot_or_i_i_i()
16870 IREG(1) = ((IREG(2) && (!IREG(3)))) ? IREG(2) : ((IREG(3) && (!IREG(2)))) ? IREG(3) : 0; in Parrot_xor_i_i_i()
17442 IREG(1) = (IREG(2) + IREG(3)); in Parrot_add_i_i_i()
18382 IREG(1) = (IREG(2) * IREG(3)); in Parrot_mul_i_i_i()
[all …]
/dports/devel/vasm/vasm/cpus/jagrisc/
H A Dopcodes.h19 "jump", { IREG }, { 52, ANY|OPSWAP },
20 "jump", { CC, IREG }, { 52, ANY|OPSWAP },
21 "load", { IREG, REG }, { 41, ANY },
26 "loadb", { IREG, REG }, { 39, ANY },
27 "loadp", { IREG, REG }, { 42, GPU },
28 "loadw", { IREG, REG }, { 40, ANY },
29 "mirror", { REG, IREG }, { 48, DSP|OPSWAP },
58 "store", { REG, IREG }, { 47, ANY|OPSWAP },
63 "storeb", { REG, IREG }, { 45, ANY|OPSWAP },
64 "storep", { REG, IREG }, { 48, GPU|OPSWAP },
[all …]
H A Dcpu.h53 IREG, /* register indirect (Rn) */ enumerator
/dports/lang/parrot/parrot-8.1.0/examples/c/
H A Dnanoparrot.c58 # define IREG(x) (_reg_base + pc[(x)]) macro
62 # define IREG(x) REG_INT(interp, pc[(x)]) macro
206 printf("%d", IREG(1));
210 IREG(1) = ICONST(2);
214 if (IREG(1))
220 IREG(1) = IREG(2) - IREG(3);
/dports/games/libretro-yabause/yabause-ea5b118/yabause/src/
H A Dsmpc.c326 SmpcRegs->SR = 0xC0 | (SmpcRegs->IREG[1] >> 4); in SmpcINTBACKPeripheral()
328 SmpcRegs->SR = 0x80 | (SmpcRegs->IREG[1] >> 4); in SmpcINTBACKPeripheral()
440 if ((SmpcInternalVars->intbackIreg0 = (SmpcRegs->IREG[0] & 1))) { in SmpcINTBACK()
449 if (SmpcRegs->IREG[1] & 0x8) { in SmpcINTBACK()
472 SmpcInternalVars->SMEM[i] = SmpcRegs->IREG[i]; in SmpcSETSMEM()
644 if ((SmpcRegs->IREG[0] == 0x01) && (SmpcRegs->IREG[1] & 0x8)) in SmpcSetTiming()
649 else if ((SmpcRegs->IREG[0] == 0x01) && ((SmpcRegs->IREG[1] & 0x8) == 0)) in SmpcSetTiming()
654 else if ((SmpcRegs->IREG[0] == 0) && (SmpcRegs->IREG[1] & 0x8)) in SmpcSetTiming()
715 if (SmpcRegs->IREG[0] & 0x40) { in SmpcWriteByte()
884 ywrite(&check, (void *)SmpcRegs->IREG, sizeof(u8), 7, fp); in SmpcSaveState()
[all …]
/dports/emulators/mednafen/mednafen/src/ss/
H A Dsmpc.cpp118 static uint8 IREG[7]; variable
461 memset(IREG, 0, sizeof(IREG)); in SMPC_Reset()
512 SFVAR(IREG), in SMPC_StateAction()
716 IREG[A] = V; in SMPC_Write()
1075 …x%02x 0x%02x 0x%02x 0x%02x", ExecutingCommand, IREG[0], IREG[1], IREG[2], IREG[3], IREG[4], IREG[5… in SMPC_Update()
1145 if(IREG[0] & 0xF) in SMPC_Update()
1168 if(IREG[1] & 0x8) in SMPC_Update()
1180 if(IREG[1] & 0x8) in SMPC_Update()
1224 if(IREG[0] & 0x40) in SMPC_Update()
1233 JR_WAIT((bool)(IREG[0] & 0x80) == JRS.NextContBit || (IREG[0] & 0x40)); in SMPC_Update()
[all …]
/dports/games/libretro-beetle_saturn/beetle-saturn-libretro-ee5b214/mednafen/ss/
H A Dsmpc.cpp115 static uint8 IREG[7]; variable
473 memset(IREG, 0, sizeof(IREG)); in SMPC_Reset()
523 SFVAR(IREG), in SMPC_StateAction()
713 IREG[A] = V; in SMPC_Write()
1068 …x%02x 0x%02x 0x%02x 0x%02x", ExecutingCommand, IREG[0], IREG[1], IREG[2], IREG[3], IREG[4], IREG[5… in SMPC_Update()
1147 if(IREG[0] & 0xF) in SMPC_Update()
1170 if(IREG[1] & 0x8) in SMPC_Update()
1182 if(IREG[1] & 0x8) in SMPC_Update()
1198 JR_WAIT((bool)(IREG[0] & 0x80) == JRS.NextContBit || (IREG[0] & 0x40)); \ in SMPC_Update()
1227 JR_WAIT((bool)(IREG[0] & 0x80) == JRS.NextContBit || (IREG[0] & 0x40)); in SMPC_Update()
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/sim/bfin/
H A Dbfin-sim.c3064 addr = IREG (i); in decode_dspLDST_0()
3073 addr = IREG (i); in decode_dspLDST_0()
3080 addr = IREG (i); in decode_dspLDST_0()
3087 addr = IREG (i); in decode_dspLDST_0()
3096 addr = IREG (i); in decode_dspLDST_0()
3103 addr = IREG (i); in decode_dspLDST_0()
3110 addr = IREG (i); in decode_dspLDST_0()
3118 addr = IREG (i); in decode_dspLDST_0()
3124 addr = IREG (i); in decode_dspLDST_0()
3130 addr = IREG (i); in decode_dspLDST_0()
[all …]
/dports/devel/gdb761/gdb-7.6.1/sim/bfin/
H A Dbfin-sim.c3139 addr = IREG (i); in decode_dspLDST_0()
3148 addr = IREG (i); in decode_dspLDST_0()
3155 addr = IREG (i); in decode_dspLDST_0()
3162 addr = IREG (i); in decode_dspLDST_0()
3171 addr = IREG (i); in decode_dspLDST_0()
3178 addr = IREG (i); in decode_dspLDST_0()
3185 addr = IREG (i); in decode_dspLDST_0()
3193 addr = IREG (i); in decode_dspLDST_0()
3199 addr = IREG (i); in decode_dspLDST_0()
3205 addr = IREG (i); in decode_dspLDST_0()
[all …]
/dports/lang/parrot/parrot-8.1.0/compilers/imcc/
H A Dimcparser.h154 IREG = 353, enumerator
270 #define IREG 353 macro
/dports/misc/adios2/ADIOS2-2.7.1/thirdparty/dill/dill/
H A Dppc64le.c31 #define IREG 0 macro
42 { 1, 1, IREG}, /* C */
43 { 1, 1, IREG}, /* UC */
44 { 2, 2, IREG}, /* S */
45 { 2, 2, IREG}, /* US */
46 { 4, 4, IREG}, /* I */
47 { 4, 4, IREG}, /* U */
49 { sizeof(long), sizeof(long), IREG}, /* L */
53 { 0, 8, IREG}, /* V */
54 { -1, 8, IREG}, /* B */
[all …]
H A Darm5.c48 #define IREG 0 macro
113 { 1, 1, IREG}, /* C */
114 { 1, 1, IREG}, /* UC */
115 { 2, 2, IREG}, /* S */
116 { 2, 2, IREG}, /* US */
117 { 4, 4, IREG}, /* I */
118 { 4, 4, IREG}, /* U */
120 { sizeof(long), sizeof(long), IREG}, /* L */
124 { 0, 8, IREG}, /* V */
125 { -1, 8, IREG}, /* B */
[all …]
H A Dpowerpc.c39 #define IREG 0 macro
50 { 1, 1, IREG}, /* C */
51 { 1, 1, IREG}, /* UC */
52 { 2, 2, IREG}, /* S */
53 { 2, 2, IREG}, /* US */
54 { 4, 4, IREG}, /* I */
55 { 4, 4, IREG}, /* U */
57 { sizeof(long), sizeof(long), IREG}, /* L */
61 { 0, 8, IREG}, /* V */
62 { -1, 8, IREG}, /* B */
[all …]
H A Dsparc.c37 #define IREG 0 macro
48 { 1, 1, IREG}, /* C */
49 { 1, 1, IREG}, /* UC */
50 { 2, 2, IREG}, /* S */
51 { 2, 2, IREG}, /* US */
52 { 4, 4, IREG}, /* I */
53 { 4, 4, IREG}, /* U */
55 { sizeof(long), sizeof(long), IREG}, /* L */
59 { 0, 8, IREG}, /* V */
60 { -1, 8, IREG}, /* B */
[all …]
H A Darm8.c59 #define IREG 0 macro
124 { 1, 1, IREG}, /* C */
125 { 1, 1, IREG}, /* UC */
126 { 2, 2, IREG}, /* S */
127 { 2, 2, IREG}, /* US */
128 { 4, 4, IREG}, /* I */
129 { 4, 4, IREG}, /* U */
131 { sizeof(long), sizeof(long), IREG}, /* L */
135 { 0, 8, IREG}, /* V */
136 { -1, 8, IREG}, /* B */
[all …]

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