/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/ |
H A D | mips-defs.h | 18 #define ISA_MIPS5 0x0000000000000010ULL macro 62 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/qemu/qemu-6.2.0/target/mips/ |
H A D | mips-defs.h | 18 #define ISA_MIPS5 0x0000000000000010ULL macro 62 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/qemu60/qemu-6.0.0/target/mips/ |
H A D | mips-defs.h | 18 #define ISA_MIPS5 0x0000000000000010ULL macro 62 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/ |
H A D | mips-defs.h | 27 #define ISA_MIPS5 0x00000010 macro 64 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/qemu-utils/qemu-4.2.1/target/mips/ |
H A D | mips-defs.h | 24 #define ISA_MIPS5 0x0000000000000010ULL macro 72 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/ |
H A D | mips-defs.h | 27 #define ISA_MIPS5 0x00000010 macro 64 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/ |
H A D | mips-defs.h | 24 #define ISA_MIPS5 0x0000000000000010ULL macro 72 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/ |
H A D | mips-defs.h | 31 #define ISA_MIPS5 0x00000010 macro 69 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/qemu42/qemu-4.2.1/target/mips/ |
H A D | mips-defs.h | 24 #define ISA_MIPS5 0x0000000000000010ULL macro 72 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/ |
H A D | mips-defs.h | 24 #define ISA_MIPS5 0x0000000000000010ULL macro 72 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/qemu5/qemu-5.2.0/target/mips/ |
H A D | mips-defs.h | 24 #define ISA_MIPS5 0x0000000000000010ULL macro 79 #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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/dports/emulators/vmips/vmips-1.5.1/libopcodes_mips/opcode/ |
H A D | mips.h | 373 #define ISA_MIPS5 (ISA_MIPS4 | INSN_ISA5) macro 375 #define ISA_MIPS64 (ISA_MIPS5 | INSN_ISA32 | INSN_ISA64)
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/opcode/ |
H A D | mips.h | 444 #define ISA_MIPS5 (ISA_MIPS4 | INSN_ISA5) 447 #define ISA_MIPS64 (ISA_MIPS5 | INSN_ISA32 | INSN_ISA64)
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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/opcode/ |
H A D | mips.h | 453 #define ISA_MIPS5 (ISA_MIPS4 | INSN_ISA5) macro 456 #define ISA_MIPS64 (ISA_MIPS5 | INSN_ISA32 | INSN_ISA64)
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/opcode/ |
H A D | mips.h | 444 #define ISA_MIPS5 (ISA_MIPS4 | INSN_ISA5) macro 447 #define ISA_MIPS64 (ISA_MIPS5 | INSN_ISA32 | INSN_ISA64)
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/dports/devel/djgpp-binutils/binutils-2.17/include/opcode/ |
H A D | mips.h | 513 #define ISA_MIPS5 (ISA_MIPS4 | INSN_ISA5) macro 516 #define ISA_MIPS64 (ISA_MIPS5 | INSN_ISA32 | INSN_ISA64)
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/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/include/opcode/ |
H A D | mips.h | 571 #define ISA_MIPS5 INSN_ISA5 macro
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/dports/devel/avr-gdb/gdb-7.3.1/include/opcode/ |
H A D | mips.h | 639 #define ISA_MIPS5 INSN_ISA5 macro
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/dports/devel/gdb761/gdb-7.6.1/include/opcode/ |
H A D | mips.h | 789 #define ISA_MIPS5 INSN_ISA5 macro
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/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/include/opcode/ |
H A D | mips.h | 1168 #define ISA_MIPS5 INSN_ISA5 macro
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/dports/devel/binutils/binutils-2.37/include/opcode/ |
H A D | mips.h | 1327 #define ISA_MIPS5 INSN_ISA5 macro
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/dports/lang/gnatdroid-binutils-x86/binutils-2.27/include/opcode/ |
H A D | mips.h | 1272 #define ISA_MIPS5 INSN_ISA5 macro
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/dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/ |
H A D | mips.h | 1327 #define ISA_MIPS5 INSN_ISA5 macro
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/dports/devel/gnulibiberty/binutils-2.37/include/opcode/ |
H A D | mips.h | 1327 #define ISA_MIPS5 INSN_ISA5 macro
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/dports/lang/gnatdroid-binutils/binutils-2.27/include/opcode/ |
H A D | mips.h | 1272 #define ISA_MIPS5 INSN_ISA5 macro
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