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Searched refs:IVTV_REG_DMASTATUS (Results 1 – 6 of 6) sorted by relevance

/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/media/pci/ivtv/
H A Divtv-irq.c544 if (read_reg(IVTV_REG_DMASTATUS) & 0x14) { in ivtv_irq_dma_read()
546 read_reg(IVTV_REG_DMASTATUS), in ivtv_irq_dma_read()
548 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_dma_read()
611 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_enc_dma_complete()
676 status = read_reg(IVTV_REG_DMASTATUS); in ivtv_irq_dma_err()
690 write_reg(status, IVTV_REG_DMASTATUS); in ivtv_irq_dma_err()
1071 IVTV_ERR("DMA TIMEOUT %08x %d\n", read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream); in ivtv_unfinished_dma()
1073 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_unfinished_dma()
H A Divtv-driver.h100 #define IVTV_REG_DMASTATUS (0x0004) macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/media/pci/ivtv/
H A Divtv-irq.c544 if (read_reg(IVTV_REG_DMASTATUS) & 0x14) { in ivtv_irq_dma_read()
546 read_reg(IVTV_REG_DMASTATUS), in ivtv_irq_dma_read()
548 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_dma_read()
611 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_enc_dma_complete()
676 status = read_reg(IVTV_REG_DMASTATUS); in ivtv_irq_dma_err()
690 write_reg(status, IVTV_REG_DMASTATUS); in ivtv_irq_dma_err()
1071 IVTV_ERR("DMA TIMEOUT %08x %d\n", read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream); in ivtv_unfinished_dma()
1073 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_unfinished_dma()
H A Divtv-driver.h100 #define IVTV_REG_DMASTATUS (0x0004) macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/media/pci/ivtv/
H A Divtv-irq.c544 if (read_reg(IVTV_REG_DMASTATUS) & 0x14) { in ivtv_irq_dma_read()
546 read_reg(IVTV_REG_DMASTATUS), in ivtv_irq_dma_read()
548 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_dma_read()
611 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_enc_dma_complete()
676 status = read_reg(IVTV_REG_DMASTATUS); in ivtv_irq_dma_err()
690 write_reg(status, IVTV_REG_DMASTATUS); in ivtv_irq_dma_err()
1071 IVTV_ERR("DMA TIMEOUT %08x %d\n", read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream); in ivtv_unfinished_dma()
1073 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_unfinished_dma()
H A Divtv-driver.h100 #define IVTV_REG_DMASTATUS (0x0004) macro