Home
last modified time | relevance | path

Searched refs:Idx64 (Results 1 – 25 of 28) sorted by relevance

12

/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1264 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1271 Idx64 = Idx32/2; in getNextPhysReg()
1273 while (Idx64 < Num64) { in getNextPhysReg()
1274 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1276 Idx64++; in getNextPhysReg()
1278 Idx32 = Idx64*2+1; in getNextPhysReg()
1283 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1264 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1271 Idx64 = Idx32/2; in getNextPhysReg()
1273 while (Idx64 < Num64) { in getNextPhysReg()
1274 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1276 Idx64++; in getNextPhysReg()
1278 Idx32 = Idx64*2+1; in getNextPhysReg()
1283 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1264 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1271 Idx64 = Idx32/2; in getNextPhysReg()
1273 while (Idx64 < Num64) { in getNextPhysReg()
1274 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1276 Idx64++; in getNextPhysReg()
1278 Idx32 = Idx64*2+1; in getNextPhysReg()
1283 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1262 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1269 Idx64 = Idx32/2; in getNextPhysReg()
1271 while (Idx64 < Num64) { in getNextPhysReg()
1272 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1274 Idx64++; in getNextPhysReg()
1276 Idx32 = Idx64*2+1; in getNextPhysReg()
1281 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1262 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1269 Idx64 = Idx32/2; in getNextPhysReg()
1271 while (Idx64 < Num64) { in getNextPhysReg()
1272 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1274 Idx64++; in getNextPhysReg()
1276 Idx32 = Idx64*2+1; in getNextPhysReg()
1281 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1262 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1269 Idx64 = Idx32/2; in getNextPhysReg()
1271 while (Idx64 < Num64) { in getNextPhysReg()
1272 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1274 Idx64++; in getNextPhysReg()
1276 Idx32 = Idx64*2+1; in getNextPhysReg()
1281 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1264 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1271 Idx64 = Idx32/2; in getNextPhysReg()
1273 while (Idx64 < Num64) { in getNextPhysReg()
1274 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1276 Idx64++; in getNextPhysReg()
1278 Idx32 = Idx64*2+1; in getNextPhysReg()
1283 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1262 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1269 Idx64 = Idx32/2; in getNextPhysReg()
1271 while (Idx64 < Num64) { in getNextPhysReg()
1272 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1274 Idx64++; in getNextPhysReg()
1276 Idx32 = Idx64*2+1; in getNextPhysReg()
1281 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1264 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1271 Idx64 = Idx32/2; in getNextPhysReg()
1273 while (Idx64 < Num64) { in getNextPhysReg()
1274 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1276 Idx64++; in getNextPhysReg()
1278 Idx32 = Idx64*2+1; in getNextPhysReg()
1283 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1262 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1269 Idx64 = Idx32/2; in getNextPhysReg()
1271 while (Idx64 < Num64) { in getNextPhysReg()
1272 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1274 Idx64++; in getNextPhysReg()
1276 Idx32 = Idx64*2+1; in getNextPhysReg()
1281 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1262 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1269 Idx64 = Idx32/2; in getNextPhysReg()
1271 while (Idx64 < Num64) { in getNextPhysReg()
1272 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1274 Idx64++; in getNextPhysReg()
1276 Idx32 = Idx64*2+1; in getNextPhysReg()
1281 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1264 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1271 Idx64 = Idx32/2; in getNextPhysReg()
1273 while (Idx64 < Num64) { in getNextPhysReg()
1274 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1276 Idx64++; in getNextPhysReg()
1278 Idx32 = Idx64*2+1; in getNextPhysReg()
1283 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1262 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1269 Idx64 = Idx32/2; in getNextPhysReg()
1271 while (Idx64 < Num64) { in getNextPhysReg()
1272 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1274 Idx64++; in getNextPhysReg()
1276 Idx32 = Idx64*2+1; in getNextPhysReg()
1281 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1264 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1271 Idx64 = Idx32/2; in getNextPhysReg()
1273 while (Idx64 < Num64) { in getNextPhysReg()
1274 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1276 Idx64++; in getNextPhysReg()
1278 Idx32 = Idx64*2+1; in getNextPhysReg()
1283 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1265 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1272 Idx64 = Idx32/2; in getNextPhysReg()
1274 while (Idx64 < Num64) { in getNextPhysReg()
1275 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1277 Idx64++; in getNextPhysReg()
1279 Idx32 = Idx64*2+1; in getNextPhysReg()
1284 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1258 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1265 Idx64 = Idx32/2; in getNextPhysReg()
1267 while (Idx64 < Num64) { in getNextPhysReg()
1268 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1270 Idx64++; in getNextPhysReg()
1272 Idx32 = Idx64*2+1; in getNextPhysReg()
1277 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1262 unsigned Idx32 = 0, Idx64 = 0; in getNextPhysReg() local
1269 Idx64 = Idx32/2; in getNextPhysReg()
1271 while (Idx64 < Num64) { in getNextPhysReg()
1272 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1274 Idx64++; in getNextPhysReg()
1276 Idx32 = Idx64*2+1; in getNextPhysReg()
1281 return (Idx64+1 < Num64) ? Phys64[Idx64+1] : 0; in getNextPhysReg()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp7901 SDValue Idx64 = DAG.getNode(ISD::ADD, DL, MVT::i64, Idx128, Idx128); in LowerDUPQLane() local
7902 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp7922 SDValue Idx64 = DAG.getNode(ISD::ADD, DL, MVT::i64, Idx128, Idx128); in LowerDUPQLane() local
7923 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp8622 SDValue Idx64 = DAG.getNode(ISD::ADD, DL, MVT::i64, Idx128, Idx128); in LowerDUPQLane() local
8623 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp9037 SDValue Idx64 = DAG.getNode(ISD::ADD, DL, MVT::i64, Idx128, Idx128); in LowerDUPQLane() local
9038 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp9037 SDValue Idx64 = DAG.getNode(ISD::ADD, DL, MVT::i64, Idx128, Idx128); in LowerDUPQLane() local
9038 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp9599 SDValue Idx64 = DAG.getNode(ISD::ADD, DL, MVT::i64, Idx128, Idx128); in LowerDUPQLane() local
9600 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp9599 SDValue Idx64 = DAG.getNode(ISD::ADD, DL, MVT::i64, Idx128, Idx128); in LowerDUPQLane() local
9600 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp9599 SDValue Idx64 = DAG.getNode(ISD::ADD, DL, MVT::i64, Idx128, Idx128); in LowerDUPQLane() local
9600 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()

12