| /dports/graphics/pixen/Pixen-0.1/libungif/ |
| H A D | dev2gif.c | 415 union REGS InRegs, OutRegs; in GetScanLine() local
436 InRegs.x.dx = Y; in GetScanLine()
437 InRegs.h.bh = 0; in GetScanLine()
440 InRegs.x.cx = i; in GetScanLine()
446 InRegs.x.dx = Y; in GetScanLine()
447 InRegs.h.bh = 0; in GetScanLine()
450 InRegs.x.cx = 0; in GetScanLine()
452 InRegs.x.dx = Y; in GetScanLine()
453 InRegs.h.bh = 0; in GetScanLine()
456 InRegs.x.cx = 1; in GetScanLine()
[all …]
|
| /dports/emulators/mednafen/mednafen/src/drivers/ |
| H A D | debugger.cpp | 289 static bool InRegs; variable
302 InRegs = false; in Regs_Init()
964 if(!InRegs) in Debugger_GT_Draw()
1018 if(InRegs) in Debugger_GT_Draw()
1128 if(InRegs) in Debugger_GT_Draw()
1588 InRegs = !InRegs; in Debugger_GT_Event()
1592 if(!InRegs) in Debugger_GT_Event()
1596 InRegs = true; in Debugger_GT_Event()
1613 if(!InRegs) in Debugger_GT_Event()
1634 if(InRegs) in Debugger_GT_Event()
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 402 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
469 std::set<unsigned> InRegs; in getInRegs() local
471 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
473 return InRegs; in getInRegs()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 402 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
472 std::set<unsigned> InRegs; in getInRegs() local
474 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
476 return InRegs; in getInRegs()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 402 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
469 std::set<unsigned> InRegs; in getInRegs() local
471 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
473 return InRegs; in getInRegs()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 402 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
472 std::set<unsigned> InRegs; in getInRegs() local
474 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
476 return InRegs; in getInRegs()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 400 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
467 std::set<unsigned> InRegs;
469 InRegs.insert(RegMaskPair.RegUnit);
471 return InRegs;
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 400 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
467 std::set<unsigned> InRegs; in getInRegs() local
469 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
471 return InRegs; in getInRegs()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 400 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
467 std::set<unsigned> InRegs; in getInRegs() local
469 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
471 return InRegs; in getInRegs()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 402 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
469 std::set<unsigned> InRegs; in getInRegs() local
471 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
473 return InRegs; in getInRegs()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 400 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
467 std::set<unsigned> InRegs; in getInRegs() local
469 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
471 return InRegs; in getInRegs()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 402 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
472 std::set<unsigned> InRegs; in getInRegs() local
474 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
476 return InRegs; in getInRegs()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 399 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
466 std::set<unsigned> InRegs; in getInRegs() local
468 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
470 return InRegs; in getInRegs()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 400 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
467 std::set<unsigned> InRegs; in getInRegs() local
469 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
471 return InRegs; in getInRegs()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 400 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
467 std::set<unsigned> InRegs; in getInRegs() local
469 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
471 return InRegs; in getInRegs()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 400 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
467 std::set<unsigned> InRegs; in getInRegs() local
469 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
471 return InRegs; in getInRegs()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 403 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
473 std::set<unsigned> InRegs; in getInRegs() local
475 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
477 return InRegs; in getInRegs()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 404 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
474 std::set<unsigned> InRegs; in getInRegs() local
476 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
478 return InRegs; in getInRegs()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.h | 404 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
474 std::set<unsigned> InRegs; in getInRegs() local
476 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
478 return InRegs; in getInRegs()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 97 SmallVector<Register, 4> InRegs; member
196 InRegs.clear(); in clearIns()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/include/llvm/CodeGen/ |
| H A D | FastISel.h | 97 SmallVector<Register, 4> InRegs; member
196 InRegs.clear(); in clearIns()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 97 SmallVector<Register, 4> InRegs; member
196 InRegs.clear(); in clearIns()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 97 SmallVector<Register, 4> InRegs; member
196 InRegs.clear(); in clearIns()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 97 SmallVector<Register, 4> InRegs; member
196 InRegs.clear(); in clearIns()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 97 SmallVector<Register, 4> InRegs; member
196 InRegs.clear(); in clearIns()
|