/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/RISCV/Utils/ |
H A D | RISCVCompressedCap.cpp | 16 uint64_t getRepresentableLength(uint64_t Length, bool IsRV64) { in getRepresentableLength() argument 17 if (IsRV64) { in getRepresentableLength() 25 uint64_t getAlignmentMask(uint64_t Length, bool IsRV64) { in getAlignmentMask() argument 26 if (IsRV64) { in getAlignmentMask() 34 TailPaddingAmount getRequiredTailPadding(uint64_t Size, bool IsRV64) { in getRequiredTailPadding() argument 35 if (IsRV64) { in getRequiredTailPadding() 44 Align getRequiredAlignment(uint64_t Size, bool IsRV64) { in getRequiredAlignment() argument 45 if (IsRV64) { in getRequiredAlignment()
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H A D | RISCVMatInt.cpp | 19 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument 35 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq() 41 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq() 71 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq() 78 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument 79 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost() 87 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
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H A D | RISCVCompressedCap.h | 19 uint64_t getRepresentableLength(uint64_t Length, bool IsRV64); 21 uint64_t getAlignmentMask(uint64_t Length, bool IsRV64); 23 TailPaddingAmount getRequiredTailPadding(uint64_t Size, bool IsRV64); 25 Align getRequiredAlignment(uint64_t Size, bool IsRV64);
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/RISCV/Utils/ |
H A D | RISCVMatInt.cpp | 17 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument 33 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq() 39 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq() 69 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq() 76 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument 77 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost() 85 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/RISCV/Utils/ |
H A D | RISCVMatInt.cpp | 19 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument 35 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq() 41 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq() 71 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq() 78 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument 79 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost() 87 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/RISCV/Utils/ |
H A D | RISCVMatInt.cpp | 19 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument 35 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq() 41 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq() 71 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq() 78 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument 79 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost() 87 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVMatInt.cpp | 17 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument 33 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq() 39 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq() 69 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq() 76 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument 77 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost() 85 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/RISCV/Utils/ |
H A D | RISCVMatInt.cpp | 19 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument 35 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq() 41 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq() 71 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq() 78 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument 79 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost() 87 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Utils/ |
H A D | RISCVMatInt.cpp | 19 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument 35 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq() 41 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq() 71 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq() 78 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument 79 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost() 87 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVMatInt.cpp | 17 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument 33 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq() 39 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq() 69 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq() 76 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument 77 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost() 85 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/RISCV/Utils/ |
H A D | RISCVMatInt.cpp | 19 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument 35 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq() 41 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq() 71 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq() 78 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument 79 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost() 87 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Support/ |
H A D | TargetParser.cpp | 254 bool checkCPUKind(CPUKind Kind, bool IsRV64) { in checkCPUKind() argument 257 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkCPUKind() 260 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) { in checkTuneCPUKind() argument 263 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkTuneCPUKind() 273 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) { in resolveTuneCPUAlias() argument 280 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) { in parseTuneCPUKind() argument 281 TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64); in parseTuneCPUKind() 294 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList() argument 296 if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) in fillValidCPUArchList() 301 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList() argument [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Support/ |
H A D | TargetParser.cpp | 254 bool checkCPUKind(CPUKind Kind, bool IsRV64) { in checkCPUKind() argument 257 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkCPUKind() 260 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) { in checkTuneCPUKind() argument 263 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkTuneCPUKind() 273 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) { in resolveTuneCPUAlias() argument 280 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) { in parseTuneCPUKind() argument 281 TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64); in parseTuneCPUKind() 294 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList() argument 296 if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) in fillValidCPUArchList() 301 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList() argument [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/include/llvm/Support/ |
H A D | TargetParser.h | 164 bool checkCPUKind(CPUKind Kind, bool IsRV64); 165 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64); 167 CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64); 169 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 170 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 172 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64);
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/include/llvm/Support/ |
H A D | TargetParser.h | 164 bool checkCPUKind(CPUKind Kind, bool IsRV64); 165 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64); 167 CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64); 169 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 170 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 172 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64);
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/include/llvm/Support/ |
H A D | TargetParser.h | 164 bool checkCPUKind(CPUKind Kind, bool IsRV64); 165 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64); 167 CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64); 169 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 170 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 172 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64);
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Support/ |
H A D | TargetParser.cpp | 254 bool checkCPUKind(CPUKind Kind, bool IsRV64) { in checkCPUKind() argument 257 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkCPUKind() 260 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) { in checkTuneCPUKind() argument 263 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkTuneCPUKind() 273 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) { in resolveTuneCPUAlias() argument 280 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) { in parseTuneCPUKind() argument 281 TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64); in parseTuneCPUKind() 294 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList() argument 296 if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) in fillValidCPUArchList() 301 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList() argument [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Support/ |
H A D | TargetParser.cpp | 262 bool checkCPUKind(CPUKind Kind, bool IsRV64) { in checkCPUKind() argument 265 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkCPUKind() 268 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) { in checkTuneCPUKind() argument 271 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkTuneCPUKind() 281 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) { in resolveTuneCPUAlias() argument 288 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) { in parseTuneCPUKind() argument 289 TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64); in parseTuneCPUKind() 302 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList() argument 304 if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) in fillValidCPUArchList() 309 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList() argument [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Support/ |
H A D | TargetParser.cpp | 262 bool checkCPUKind(CPUKind Kind, bool IsRV64) { in checkCPUKind() argument 265 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkCPUKind() 268 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) { in checkTuneCPUKind() argument 271 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkTuneCPUKind() 281 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) { in resolveTuneCPUAlias() argument 288 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) { in parseTuneCPUKind() argument 289 TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64); in parseTuneCPUKind() 302 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList() argument 304 if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) in fillValidCPUArchList() 309 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList() argument [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Support/ |
H A D | TargetParser.cpp | 262 bool checkCPUKind(CPUKind Kind, bool IsRV64) { in checkCPUKind() argument 265 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkCPUKind() 268 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) { in checkTuneCPUKind() argument 271 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkTuneCPUKind() 281 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) { in resolveTuneCPUAlias() argument 288 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) { in parseTuneCPUKind() argument 289 TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64); in parseTuneCPUKind() 302 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList() argument 304 if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) in fillValidCPUArchList() 309 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList() argument [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Support/ |
H A D | TargetParser.cpp | 262 bool checkCPUKind(CPUKind Kind, bool IsRV64) { in checkCPUKind() argument 265 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkCPUKind() 268 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) { in checkTuneCPUKind() argument 271 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkTuneCPUKind() 281 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) { in resolveTuneCPUAlias() argument 288 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) { in parseTuneCPUKind() argument 289 TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64); in parseTuneCPUKind() 302 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList() argument 304 if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) in fillValidCPUArchList() 309 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList() argument [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Support/ |
H A D | TargetParser.cpp | 262 bool checkCPUKind(CPUKind Kind, bool IsRV64) { in checkCPUKind() argument 265 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkCPUKind() 268 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) { in checkTuneCPUKind() argument 271 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkTuneCPUKind() 281 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) { in resolveTuneCPUAlias() argument 288 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) { in parseTuneCPUKind() argument 289 TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64); in parseTuneCPUKind() 302 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList() argument 304 if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) in fillValidCPUArchList() 309 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList() argument [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Support/ |
H A D | TargetParser.cpp | 262 bool checkCPUKind(CPUKind Kind, bool IsRV64) { in checkCPUKind() argument 265 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkCPUKind() 268 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) { in checkTuneCPUKind() argument 271 return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; in checkTuneCPUKind() 281 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) { in resolveTuneCPUAlias() argument 288 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) { in parseTuneCPUKind() argument 289 TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64); in parseTuneCPUKind() 302 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList() argument 304 if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) in fillValidCPUArchList() 309 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList() argument [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/include/llvm/Support/ |
H A D | TargetParser.h | 168 bool checkCPUKind(CPUKind Kind, bool IsRV64); 169 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64); 171 CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64); 173 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 174 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 176 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64);
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/include/llvm/Support/ |
H A D | TargetParser.h | 168 bool checkCPUKind(CPUKind Kind, bool IsRV64); 169 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64); 171 CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64); 173 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 174 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); 176 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64);
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