/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 205 bool IsTiedToChangedOp = false; in tryInlineAsm() local 209 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 217 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 294 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 206 bool IsTiedToChangedOp = false; in tryInlineAsm() local 210 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 218 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 295 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 206 bool IsTiedToChangedOp = false; in tryInlineAsm() local 210 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 218 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm() 295 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 4328 bool IsTiedToChangedOp = false; in tryInlineAsm() local 4332 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 4351 if ((!IsTiedToChangedOp && (!HasRC || RC != ARM::GPRRegClassID)) in tryInlineAsm() 4417 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 4185 bool IsTiedToChangedOp = false; in tryInlineAsm() local 4189 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 4208 if ((!IsTiedToChangedOp && (!HasRC || RC != ARM::GPRRegClassID)) in tryInlineAsm() 4274 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 4181 bool IsTiedToChangedOp = false; in tryInlineAsm() local 4185 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 4204 if ((!IsTiedToChangedOp && (!HasRC || RC != ARM::GPRRegClassID)) in tryInlineAsm() 4270 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 4928 bool IsTiedToChangedOp = false; in tryInlineAsm() local 4932 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 4951 if ((!IsTiedToChangedOp && (!HasRC || RC != ARM::GPRRegClassID)) in tryInlineAsm() 5017 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 4928 bool IsTiedToChangedOp = false; in tryInlineAsm() local 4932 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 4951 if ((!IsTiedToChangedOp && (!HasRC || RC != ARM::GPRRegClassID)) in tryInlineAsm() 5017 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 4928 bool IsTiedToChangedOp = false; in tryInlineAsm() local 4932 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 4951 if ((!IsTiedToChangedOp && (!HasRC || RC != ARM::GPRRegClassID)) in tryInlineAsm() 5017 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 5314 bool IsTiedToChangedOp = false; in tryInlineAsm() local 5318 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 5337 if ((!IsTiedToChangedOp && (!HasRC || RC != ARM::GPRRegClassID)) in tryInlineAsm() 5403 if (IsTiedToChangedOp) in tryInlineAsm()
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 5314 bool IsTiedToChangedOp = false; in tryInlineAsm() local 5318 IsTiedToChangedOp = OpChanged[DefIdx]; in tryInlineAsm() 5337 if ((!IsTiedToChangedOp && (!HasRC || RC != ARM::GPRRegClassID)) in tryInlineAsm() 5403 if (IsTiedToChangedOp) in tryInlineAsm()
|