Home
last modified time | relevance | path

Searched refs:L4_8 (Results 1 – 25 of 26) sorted by relevance

12

/dports/devel/gdb761/gdb-7.6.1/opcodes/
H A Ds390-opc.c161 #define L4_8 44 /* 4 bit length starting at position 8 */ macro
390 #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
391 #define INSTR_RSL_LRDFU 6, { F_32,D_20,L4_8,B_16,U4_36,0 } /* e.g. cdzt */
392 #define INSTR_RSL_LRDFEU 6, { FE_32,D_20,L4_8,B_16,U4_36,0 } /* e.g. cxzt */
436 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
437 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Ds390-opc.c104 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
235 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
236 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Ds390-opc.c104 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
235 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
236 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Ds390-opc.c104 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
235 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
236 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Ds390-opc.c125 #define L4_8 30 /* 4 bit length starting at position 8 */ macro
303 #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
336 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
337 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Ds390-opc.c104 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
247 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
248 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/s390/kernel/
H A Ddis.c102 L4_8, /* 4 bit length starting at position 8 */ enumerator
164 [L4_8] = { 4, 8, OPERAND_LENGTH },
257 [INSTR_RSL_R0RD] = { D_20, L4_8, B_16, 0, 0, 0 },
290 [INSTR_SS_LIRDRD] = { D_20, L4_8, B_16, D_36, B_32, U4_12 },
291 [INSTR_SS_LLRDRD] = { D_20, L4_8, B_16, D_36, L4_12, B_32 },
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/s390/kernel/
H A Ddis.c102 L4_8, /* 4 bit length starting at position 8 */ enumerator
164 [L4_8] = { 4, 8, OPERAND_LENGTH },
257 [INSTR_RSL_R0RD] = { D_20, L4_8, B_16, 0, 0, 0 },
290 [INSTR_SS_LIRDRD] = { D_20, L4_8, B_16, D_36, B_32, U4_12 },
291 [INSTR_SS_LLRDRD] = { D_20, L4_8, B_16, D_36, L4_12, B_32 },
/dports/multimedia/libv4l/linux-5.13-rc2/arch/s390/kernel/
H A Ddis.c102 L4_8, /* 4 bit length starting at position 8 */ enumerator
164 [L4_8] = { 4, 8, OPERAND_LENGTH },
257 [INSTR_RSL_R0RD] = { D_20, L4_8, B_16, 0, 0, 0 },
290 [INSTR_SS_LIRDRD] = { D_20, L4_8, B_16, D_36, B_32, U4_12 },
291 [INSTR_SS_LLRDRD] = { D_20, L4_8, B_16, D_36, L4_12, B_32 },
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Ds390-opc.c167 #define L4_8 45 /* 4 bit length starting at position 8 */ macro
397 #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
443 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
444 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Ds390-opc.c167 #define L4_8 45 /* 4 bit length starting at position 8 */ macro
397 #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
443 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
444 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/
H A Ds390-opc.c167 #define L4_8 45 /* 4 bit length starting at position 8 */ macro
405 #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
453 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
454 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/devel/gdb/gdb-11.1/opcodes/
H A Ds390-opc.c167 #define L4_8 45 /* 4 bit length starting at position 8 */ macro
405 #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
453 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
454 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/devel/gnulibiberty/binutils-2.37/opcodes/
H A Ds390-opc.c167 #define L4_8 45 /* 4 bit length starting at position 8 */ macro
405 #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
453 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
454 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/devel/binutils/binutils-2.37/opcodes/
H A Ds390-opc.c167 #define L4_8 45 /* 4 bit length starting at position 8 */ macro
405 #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
453 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
454 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Ds390-dis.c494 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
650 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
651 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Ds390.c541 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
717 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
718 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Ds390.c541 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
717 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
718 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Ds390.c541 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
717 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
718 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Ds390.c541 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
717 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
718 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Ds390.c542 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
718 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
719 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Ds390.c541 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
717 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
718 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Ds390.c541 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
717 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
718 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/
H A Ds390.c541 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
717 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
718 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/
H A Ds390.c541 #define L4_8 27 /* 4 bit length starting at position 8 */ macro
717 #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
718 #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */

12