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Searched refs:LCCR5_IUM (Results 1 – 15 of 15) sorted by relevance

/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/
H A Dregs-lcd.h138 #define LCCR5_IUM(x) (1 << ((x) + 23)) /* input underrun mask */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/
H A Dregs-lcd.h138 #define LCCR5_IUM(x) (1 << ((x) + 23)) /* input underrun mask */ macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/
H A Dregs-lcd.h138 #define LCCR5_IUM(x) (1 << ((x) + 23)) /* input underrun mask */ macro
/dports/emulators/qemu42/qemu-4.2.1/hw/display/
H A Dpxa2xx_lcd.c161 #define LCCR5_IUM(ch) (1 << (ch + 23)) macro
197 level |= (s->status[0] & LCSR0_IU1) && !(s->control[5] & LCCR5_IUM(1)); in pxa2xx_lcdc_int_update()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/display/
H A Dpxa2xx_lcd.c159 #define LCCR5_IUM(ch) (1 << (ch + 23)) macro
195 level |= (s->status[0] & LCSR0_IU1) && !(s->control[5] & LCCR5_IUM(1)); in pxa2xx_lcdc_int_update()
/dports/emulators/qemu5/qemu-5.2.0/hw/display/
H A Dpxa2xx_lcd.c161 #define LCCR5_IUM(ch) (1 << (ch + 23)) macro
197 level |= (s->status[0] & LCSR0_IU1) && !(s->control[5] & LCCR5_IUM(1)); in pxa2xx_lcdc_int_update()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/display/
H A Dpxa2xx_lcd.c161 #define LCCR5_IUM(ch) (1 << (ch + 23)) macro
197 level |= (s->status[0] & LCSR0_IU1) && !(s->control[5] & LCCR5_IUM(1)); in pxa2xx_lcdc_int_update()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/display/
H A Dpxa2xx_lcd.c161 #define LCCR5_IUM(ch) (1 << (ch + 23)) in init()
197 level |= (s->status[0] & LCSR0_IU1) && !(s->control[5] & LCCR5_IUM(1)); in init()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/display/
H A Dpxa2xx_lcd.c161 #define LCCR5_IUM(ch) (1 << (ch + 23)) macro
197 level |= (s->status[0] & LCSR0_IU1) && !(s->control[5] & LCCR5_IUM(1)); in pxa2xx_lcdc_int_update()
/dports/emulators/qemu/qemu-6.2.0/hw/display/
H A Dpxa2xx_lcd.c161 #define LCCR5_IUM(ch) (1 << (ch + 23)) macro
626 level |= (s->status[0] & LCSR0_IU1) && !(s->control[5] & LCCR5_IUM(1)); in pxa2xx_lcdc_int_update()
/dports/emulators/qemu60/qemu-6.0.0/hw/display/
H A Dpxa2xx_lcd.c161 #define LCCR5_IUM(ch) (1 << (ch + 23)) macro
626 level |= (s->status[0] & LCSR0_IU1) && !(s->control[5] & LCCR5_IUM(1)); in pxa2xx_lcdc_int_update()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/display/
H A Dpxa2xx_lcd.c161 #define LCCR5_IUM(ch) (1 << (ch + 23)) macro
626 level |= (s->status[0] & LCSR0_IU1) && !(s->control[5] & LCCR5_IUM(1)); in pxa2xx_lcdc_int_update()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/video/fbdev/
H A Dpxafb.c1178 lcd_writel(fbi, LCCR5, LCCR5_IUM(6)); in pxafb_smart_flush()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/video/fbdev/
H A Dpxafb.c1178 lcd_writel(fbi, LCCR5, LCCR5_IUM(6)); in pxafb_smart_flush()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/video/fbdev/
H A Dpxafb.c1178 lcd_writel(fbi, LCCR5, LCCR5_IUM(6)); in pxafb_smart_flush()