/dports/emulators/mess/mame-mame0226/src/devices/bus/ti99/peb/ |
H A D | hsgpl.cpp | 129 #define LOG_CRU (1U<<6) macro 215 LOGMASKED(LOG_CRU, "Set dsr_enabled=%x\n", data); in cruwrite() 219 LOGMASKED(LOG_CRU, "Set gram_enabled=%x\n", data); in cruwrite() 223 LOGMASKED(LOG_CRU, "Set bank_inhibit=%x\n", data); in cruwrite() 235 LOGMASKED(LOG_CRU, "Set dsr_page=%d\n", m_dsr_page); in cruwrite() 239 LOGMASKED(LOG_CRU, "Set card_enabled=%x\n", data); in cruwrite() 243 LOGMASKED(LOG_CRU, "Set write_enabled=%x\n", data); in cruwrite() 248 LOGMASKED(LOG_CRU, "Set supercart_enabled=%x\n", data); in cruwrite() 252 LOGMASKED(LOG_CRU, "Set led_on=%x\n", data); in cruwrite() 258 LOGMASKED(LOG_CRU, "Set mbx_enabled=%x\n", data); in cruwrite() [all …]
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H A D | tn_ide.cpp | 126 #define LOG_CRU (1U<<2) macro 557 LOGMASKED(LOG_CRU, "cru %04x (bit %d) -> %d\n", offset, (offset & 0xff)>>1, bit); in crureadz() 577 LOGMASKED(LOG_CRU, "Turn card %s\n", (data&1)? "on" : "off"); in cruwrite() 580 LOGMASKED(LOG_CRU, "Map %s at 4000-40FF\n", ((data&1)==m_srammap)? "register" : "SRAM"); in cruwrite() 583 LOGMASKED(LOG_CRU, "%s SRAM page\n", (data&1)? "Enable switch" : "Fixed"); in cruwrite() 586 LOGMASKED(LOG_CRU, "%s\n", (data&1)? "Same page at 4000-5FFF" : "Fix page 0 at 4000-4FFF"); in cruwrite() 589 LOGMASKED(LOG_CRU, "%s RAMBO\n", (data&1)? "Enable" : "Disable"); in cruwrite() 592 LOGMASKED(LOG_CRU, "Write %s SRAM\n", (data&1)? "protect" : "enable"); in cruwrite() 595 LOGMASKED(LOG_CRU, "%s IDE interrupt\n", (data&1)? "Enable" : "Disable"); in cruwrite() 598 LOGMASKED(LOG_CRU, "%s\n", (data&1)? "Reset drives" : "Normal operation"); in cruwrite()
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H A D | ti_fdc.cpp | 24 #define LOG_CRU (1U<<5) macro 223 LOGMASKED(LOG_CRU, "Read CRU %04x = %02x\n", offset, *value); in crureadz() 237 LOGMASKED(LOG_CRU, "Map DSR (bit 0) = %d\n", m_selected); in WRITE_LINE_MEMBER() 271 LOGMASKED(LOG_CRU, "Arm wait state logic (bit 2) = %d\n", state); in WRITE_LINE_MEMBER() 277 LOGMASKED(LOG_CRU, "Set head load (bit 3) = %d\n", state); in WRITE_LINE_MEMBER() 283 LOGMASKED(LOG_CRU, "Set side (bit 7) = %d\n", state); in WRITE_LINE_MEMBER() 309 LOGMASKED(LOG_CRU, "Unselect drive DSK%d\n", n); in select_drive() 321 LOGMASKED(LOG_CRU, "Select drive DSK%d\n", n); in select_drive()
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H A D | bwg.cpp | 55 #define LOG_CRU (1U<<3) // Show CRU bit accesses macro 397 LOGMASKED(LOG_CRU, "Map DSR (bit 0) = %d\n", m_selected); in WRITE_LINE_MEMBER() 412 LOGMASKED(LOG_CRU, "Arm wait state logic (bit 2) = %d\n", state); in WRITE_LINE_MEMBER() 418 LOGMASKED(LOG_CRU, "Set head load (bit 3) = %d\n", state); in WRITE_LINE_MEMBER() 446 LOGMASKED(LOG_CRU, "Unselect drive DSK%d\n", n); in select_drive() 460 LOGMASKED(LOG_CRU, "Select drive DSK%d\n", n); in select_drive() 480 LOGMASKED(LOG_CRU, "Set side (bit 7) = %d on DSK%d\n", state, m_sel_floppy); in WRITE_LINE_MEMBER() 488 LOGMASKED(LOG_CRU, "Set density (bit 10) = %d (%s)\n", state, (state!=0)? "single" : "double"); in WRITE_LINE_MEMBER()
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H A D | myarcfdc.cpp | 39 #define LOG_CRU (1U<<10) // CRU operations macro 222 LOGMASKED(LOG_CRU, "cru %04x (bit %d) -> %d\n", offset, bitno, *value); in crureadz() 237 LOGMASKED(LOG_CRU, "cru %04x (bit %d) <- %d\n", offset, bitno, data); in cruwrite() 272 LOGMASKED(LOG_CRU, "Card enable = %d\n", state); in WRITE_LINE_MEMBER() 278 LOGMASKED(LOG_CRU, "Controller reset = %d\n", state); in WRITE_LINE_MEMBER() 284 LOGMASKED(LOG_CRU, "Side select = %d\n", state); in WRITE_LINE_MEMBER() 295 LOGMASKED(LOG_CRU, "EPROM bank select = %d\n", state); in WRITE_LINE_MEMBER()
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H A D | hfdc.cpp | 71 #define LOG_CRU (1U<<10) macro 400 LOGMASKED(LOG_CRU, "CRU %04x -> %02x\n", offset & 0xffff, *value); in crureadz() 432 LOGMASKED(LOG_CRU, "CRU %04x <- %d\n", offset & 0xffff, data); in cruwrite() 445 if (bit==0x0d) LOGMASKED(LOG_CRU, "RAM page @5400 = %d\n", m_ram_page[1]); in cruwrite() 446 if (bit==0x12) LOGMASKED(LOG_CRU, "RAM page @5800 = %d\n", m_ram_page[2]); in cruwrite() 447 if (bit==0x17) LOGMASKED(LOG_CRU, "RAM page @5C00 = %d\n", m_ram_page[3]); in cruwrite() 457 if (m_selected != turnOn) LOGMASKED(LOG_CRU, "card %s\n", turnOn? "selected" : "unselected"); in cruwrite() 462 if (data==0) LOGMASKED(LOG_CRU, "trigger HDC reset\n"); in cruwrite() 486 LOGMASKED(LOG_CRU, "ROM page = %d\n", m_rom_page); in cruwrite() 492 LOGMASKED(LOG_CRU, "ROM page = %d, see_switches = %d\n", m_rom_page, m_see_switches); in cruwrite()
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H A D | horizon.cpp | 65 #define LOG_CRU (1U<<5) macro 317 LOGMASKED(LOG_CRU, "CRU write bit %d <- %d\n", bit, data); in cruwrite() 322 LOGMASKED(LOG_CRU, "Activate ROS = %d\n", m_selected); in cruwrite() 347 LOGMASKED(LOG_CRU, "RAMBO = %d\n", m_rambo_mode); in cruwrite()
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H A D | cc_fdc.cpp | 44 #define LOG_CRU (1U<<10) // CRU operations macro 269 LOGMASKED(LOG_CRU, "cru %04x (bit %d) -> %d\n", offset, bitno, *value); in crureadz() 279 LOGMASKED(LOG_CRU, "cru %04x (bit %d) <- %d\n", offset, bitno, data); in cruwrite() 403 LOGMASKED(LOG_CRU, "Set bank %d\n", state); in WRITE_LINE_MEMBER() 410 LOGMASKED(LOG_CRU, "Select card = %d\n", state); in WRITE_LINE_MEMBER()
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H A D | pcode.cpp | 83 #define LOG_CRU (1U<<6) macro 270 LOGMASKED(LOG_CRU, "Select rom bank %d\n", m_bank_select); in WRITE_LINE_MEMBER()
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/dports/emulators/mame/mame-mame0226/src/devices/bus/ti99/peb/ |
H A D | hsgpl.cpp | 129 #define LOG_CRU (1U<<6) macro 215 LOGMASKED(LOG_CRU, "Set dsr_enabled=%x\n", data); in cruwrite() 219 LOGMASKED(LOG_CRU, "Set gram_enabled=%x\n", data); in cruwrite() 223 LOGMASKED(LOG_CRU, "Set bank_inhibit=%x\n", data); in cruwrite() 235 LOGMASKED(LOG_CRU, "Set dsr_page=%d\n", m_dsr_page); in cruwrite() 239 LOGMASKED(LOG_CRU, "Set card_enabled=%x\n", data); in cruwrite() 243 LOGMASKED(LOG_CRU, "Set write_enabled=%x\n", data); in cruwrite() 248 LOGMASKED(LOG_CRU, "Set supercart_enabled=%x\n", data); in cruwrite() 252 LOGMASKED(LOG_CRU, "Set led_on=%x\n", data); in cruwrite() 258 LOGMASKED(LOG_CRU, "Set mbx_enabled=%x\n", data); in cruwrite() [all …]
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H A D | tn_ide.cpp | 126 #define LOG_CRU (1U<<2) macro 557 LOGMASKED(LOG_CRU, "cru %04x (bit %d) -> %d\n", offset, (offset & 0xff)>>1, bit); in crureadz() 577 LOGMASKED(LOG_CRU, "Turn card %s\n", (data&1)? "on" : "off"); in cruwrite() 580 LOGMASKED(LOG_CRU, "Map %s at 4000-40FF\n", ((data&1)==m_srammap)? "register" : "SRAM"); in cruwrite() 583 LOGMASKED(LOG_CRU, "%s SRAM page\n", (data&1)? "Enable switch" : "Fixed"); in cruwrite() 586 LOGMASKED(LOG_CRU, "%s\n", (data&1)? "Same page at 4000-5FFF" : "Fix page 0 at 4000-4FFF"); in cruwrite() 589 LOGMASKED(LOG_CRU, "%s RAMBO\n", (data&1)? "Enable" : "Disable"); in cruwrite() 592 LOGMASKED(LOG_CRU, "Write %s SRAM\n", (data&1)? "protect" : "enable"); in cruwrite() 595 LOGMASKED(LOG_CRU, "%s IDE interrupt\n", (data&1)? "Enable" : "Disable"); in cruwrite() 598 LOGMASKED(LOG_CRU, "%s\n", (data&1)? "Reset drives" : "Normal operation"); in cruwrite()
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H A D | ti_fdc.cpp | 24 #define LOG_CRU (1U<<5) macro 223 LOGMASKED(LOG_CRU, "Read CRU %04x = %02x\n", offset, *value); in crureadz() 237 LOGMASKED(LOG_CRU, "Map DSR (bit 0) = %d\n", m_selected); in WRITE_LINE_MEMBER() 271 LOGMASKED(LOG_CRU, "Arm wait state logic (bit 2) = %d\n", state); in WRITE_LINE_MEMBER() 277 LOGMASKED(LOG_CRU, "Set head load (bit 3) = %d\n", state); in WRITE_LINE_MEMBER() 283 LOGMASKED(LOG_CRU, "Set side (bit 7) = %d\n", state); in WRITE_LINE_MEMBER() 309 LOGMASKED(LOG_CRU, "Unselect drive DSK%d\n", n); in select_drive() 321 LOGMASKED(LOG_CRU, "Select drive DSK%d\n", n); in select_drive()
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H A D | bwg.cpp | 55 #define LOG_CRU (1U<<3) // Show CRU bit accesses macro 397 LOGMASKED(LOG_CRU, "Map DSR (bit 0) = %d\n", m_selected); in WRITE_LINE_MEMBER() 412 LOGMASKED(LOG_CRU, "Arm wait state logic (bit 2) = %d\n", state); in WRITE_LINE_MEMBER() 418 LOGMASKED(LOG_CRU, "Set head load (bit 3) = %d\n", state); in WRITE_LINE_MEMBER() 446 LOGMASKED(LOG_CRU, "Unselect drive DSK%d\n", n); in select_drive() 460 LOGMASKED(LOG_CRU, "Select drive DSK%d\n", n); in select_drive() 480 LOGMASKED(LOG_CRU, "Set side (bit 7) = %d on DSK%d\n", state, m_sel_floppy); in WRITE_LINE_MEMBER() 488 LOGMASKED(LOG_CRU, "Set density (bit 10) = %d (%s)\n", state, (state!=0)? "single" : "double"); in WRITE_LINE_MEMBER()
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H A D | myarcfdc.cpp | 39 #define LOG_CRU (1U<<10) // CRU operations macro 222 LOGMASKED(LOG_CRU, "cru %04x (bit %d) -> %d\n", offset, bitno, *value); in crureadz() 237 LOGMASKED(LOG_CRU, "cru %04x (bit %d) <- %d\n", offset, bitno, data); in cruwrite() 272 LOGMASKED(LOG_CRU, "Card enable = %d\n", state); in WRITE_LINE_MEMBER() 278 LOGMASKED(LOG_CRU, "Controller reset = %d\n", state); in WRITE_LINE_MEMBER() 284 LOGMASKED(LOG_CRU, "Side select = %d\n", state); in WRITE_LINE_MEMBER() 295 LOGMASKED(LOG_CRU, "EPROM bank select = %d\n", state); in WRITE_LINE_MEMBER()
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H A D | hfdc.cpp | 71 #define LOG_CRU (1U<<10) macro 400 LOGMASKED(LOG_CRU, "CRU %04x -> %02x\n", offset & 0xffff, *value); in crureadz() 432 LOGMASKED(LOG_CRU, "CRU %04x <- %d\n", offset & 0xffff, data); in cruwrite() 445 if (bit==0x0d) LOGMASKED(LOG_CRU, "RAM page @5400 = %d\n", m_ram_page[1]); in cruwrite() 446 if (bit==0x12) LOGMASKED(LOG_CRU, "RAM page @5800 = %d\n", m_ram_page[2]); in cruwrite() 447 if (bit==0x17) LOGMASKED(LOG_CRU, "RAM page @5C00 = %d\n", m_ram_page[3]); in cruwrite() 457 if (m_selected != turnOn) LOGMASKED(LOG_CRU, "card %s\n", turnOn? "selected" : "unselected"); in cruwrite() 462 if (data==0) LOGMASKED(LOG_CRU, "trigger HDC reset\n"); in cruwrite() 486 LOGMASKED(LOG_CRU, "ROM page = %d\n", m_rom_page); in cruwrite() 492 LOGMASKED(LOG_CRU, "ROM page = %d, see_switches = %d\n", m_rom_page, m_see_switches); in cruwrite()
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H A D | horizon.cpp | 65 #define LOG_CRU (1U<<5) macro 317 LOGMASKED(LOG_CRU, "CRU write bit %d <- %d\n", bit, data); in cruwrite() 322 LOGMASKED(LOG_CRU, "Activate ROS = %d\n", m_selected); in cruwrite() 347 LOGMASKED(LOG_CRU, "RAMBO = %d\n", m_rambo_mode); in cruwrite()
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H A D | cc_fdc.cpp | 44 #define LOG_CRU (1U<<10) // CRU operations macro 269 LOGMASKED(LOG_CRU, "cru %04x (bit %d) -> %d\n", offset, bitno, *value); in crureadz() 279 LOGMASKED(LOG_CRU, "cru %04x (bit %d) <- %d\n", offset, bitno, data); in cruwrite() 403 LOGMASKED(LOG_CRU, "Set bank %d\n", state); in WRITE_LINE_MEMBER() 410 LOGMASKED(LOG_CRU, "Select card = %d\n", state); in WRITE_LINE_MEMBER()
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/dports/emulators/mess/mame-mame0226/src/mame/drivers/ |
H A D | ti99_2.cpp | 178 #define LOG_CRU (1U<<2) // CRU activities macro 299 LOGMASKED(LOG_CRU, "Setting 9995 decrementer to %s mode\n", (data==1)? "event" : "timer"); in intflag_write() 302 LOGMASKED(LOG_CRU, "Setting 9995 decrementer to %s\n", (data==1)? "enabled" : "disabled"); in intflag_write() 305 if (data==0) LOGMASKED(LOG_CRU, "Clear INT1 latch\n"); in intflag_write() 308 if (data==0) LOGMASKED(LOG_CRU, "Clear INT3 latch\n"); in intflag_write() 311 if (data==0) LOGMASKED(LOG_CRU, "Clear INT4 latch\n"); in intflag_write() 314 LOGMASKED(LOG_CRU, "Switch to bank %d\n", data); in intflag_write() 318 LOGMASKED(LOG_CRU, "Writing internal flag %04x = %d\n", addr, data); in intflag_write()
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/dports/emulators/mame/mame-mame0226/src/mame/drivers/ |
H A D | ti99_2.cpp | 178 #define LOG_CRU (1U<<2) // CRU activities macro 299 LOGMASKED(LOG_CRU, "Setting 9995 decrementer to %s mode\n", (data==1)? "event" : "timer"); in intflag_write() 302 LOGMASKED(LOG_CRU, "Setting 9995 decrementer to %s\n", (data==1)? "enabled" : "disabled"); in intflag_write() 305 if (data==0) LOGMASKED(LOG_CRU, "Clear INT1 latch\n"); in intflag_write() 308 if (data==0) LOGMASKED(LOG_CRU, "Clear INT3 latch\n"); in intflag_write() 311 if (data==0) LOGMASKED(LOG_CRU, "Clear INT4 latch\n"); in intflag_write() 314 LOGMASKED(LOG_CRU, "Switch to bank %d\n", data); in intflag_write() 318 LOGMASKED(LOG_CRU, "Writing internal flag %04x = %d\n", addr, data); in intflag_write()
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/dports/emulators/mess/mame-mame0226/src/devices/bus/hexbus/ |
H A D | hx5102.cpp | 83 #define LOG_CRU (1U<<6) // CRU macro 489 LOGMASKED(LOG_CRU, "Set precompensation = %d\n", state); in WRITE_LINE_MEMBER() 494 LOGMASKED(LOG_CRU, "Set step direction = %d\n", state); in WRITE_LINE_MEMBER() 502 LOGMASKED(LOG_CRU, "Assert DACK*\n"); in WRITE_LINE_MEMBER() 509 LOGMASKED(LOG_CRU, "Step pulse\n"); in WRITE_LINE_MEMBER() 516 LOGMASKED(LOG_CRU, "Set drive select 0 to %d\n", state); in WRITE_LINE_MEMBER() 526 LOGMASKED(LOG_CRU, "Set drive select 1 to %d\n", state); in WRITE_LINE_MEMBER() 537 LOGMASKED(LOG_CRU, "Set drive select 2 to %d\n", state); in WRITE_LINE_MEMBER() 543 LOGMASKED(LOG_CRU, "Set drive select 3 to %d\n", state); in WRITE_LINE_MEMBER() 549 LOGMASKED(LOG_CRU, "Set auxiliary motor line to %d\n", state); in WRITE_LINE_MEMBER() [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/bus/hexbus/ |
H A D | hx5102.cpp | 83 #define LOG_CRU (1U<<6) // CRU macro 489 LOGMASKED(LOG_CRU, "Set precompensation = %d\n", state); in WRITE_LINE_MEMBER() 494 LOGMASKED(LOG_CRU, "Set step direction = %d\n", state); in WRITE_LINE_MEMBER() 502 LOGMASKED(LOG_CRU, "Assert DACK*\n"); in WRITE_LINE_MEMBER() 509 LOGMASKED(LOG_CRU, "Step pulse\n"); in WRITE_LINE_MEMBER() 516 LOGMASKED(LOG_CRU, "Set drive select 0 to %d\n", state); in WRITE_LINE_MEMBER() 526 LOGMASKED(LOG_CRU, "Set drive select 1 to %d\n", state); in WRITE_LINE_MEMBER() 537 LOGMASKED(LOG_CRU, "Set drive select 2 to %d\n", state); in WRITE_LINE_MEMBER() 543 LOGMASKED(LOG_CRU, "Set drive select 3 to %d\n", state); in WRITE_LINE_MEMBER() 549 LOGMASKED(LOG_CRU, "Set auxiliary motor line to %d\n", state); in WRITE_LINE_MEMBER() [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/bus/ti99/internal/ |
H A D | genboard.cpp | 422 #define LOG_CRU (1U<<9) macro 495 LOGMASKED(LOG_CRU, "Set PAL flag = %02x\n", data); in cru_ctrl_write() 510 LOGMASKED(LOG_CRU, "Operation mode = %s\n", (data!=0)? "native" : "GPL"); in cru_ctrl_write() 514 LOGMASKED(LOG_CRU, "Addressing mode = %s\n", (data!=0)? "unmapped" : "mapped"); in cru_ctrl_write() 518 LOGMASKED(LOG_CRU, "Cartridge ROM: %s\n", (data==0)? "banked" : "unbanked"); in cru_ctrl_write() 522 LOGMASKED(LOG_CRU, "Cartridge ROM 6000-6fff %s\n", (data!=0)? "writable" : "protected"); in cru_ctrl_write() 526 LOGMASKED(LOG_CRU, "Cartridge ROM 7000-7fff %s\n", (data!=0)? "writable" : "protected"); in cru_ctrl_write() 530 LOGMASKED(LOG_CRU, "Extra wait states %s\n", (data==0)? "enabled" : "disabled"); in cru_ctrl_write()
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H A D | 992board.cpp | 23 #define LOG_CRU (1U<<2) // CRU logging macro 500 LOGMASKED(LOG_CRU, "Invalid CRU access to %04x\n", address); in cruread() 509 LOGMASKED(LOG_CRU, "CRU %04x <- %1x\n", address, data); in cruwrite() 536 LOGMASKED(LOG_CRU, "VIDENA = %d\n", data); in cruwrite() 562 LOGMASKED(LOG_CRU, "Cassette output = %d\n", data); in cruwrite()
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/dports/emulators/mame/mame-mame0226/src/devices/bus/ti99/internal/ |
H A D | genboard.cpp | 422 #define LOG_CRU (1U<<9) macro 495 LOGMASKED(LOG_CRU, "Set PAL flag = %02x\n", data); in cru_ctrl_write() 510 LOGMASKED(LOG_CRU, "Operation mode = %s\n", (data!=0)? "native" : "GPL"); in cru_ctrl_write() 514 LOGMASKED(LOG_CRU, "Addressing mode = %s\n", (data!=0)? "unmapped" : "mapped"); in cru_ctrl_write() 518 LOGMASKED(LOG_CRU, "Cartridge ROM: %s\n", (data==0)? "banked" : "unbanked"); in cru_ctrl_write() 522 LOGMASKED(LOG_CRU, "Cartridge ROM 6000-6fff %s\n", (data!=0)? "writable" : "protected"); in cru_ctrl_write() 526 LOGMASKED(LOG_CRU, "Cartridge ROM 7000-7fff %s\n", (data!=0)? "writable" : "protected"); in cru_ctrl_write() 530 LOGMASKED(LOG_CRU, "Extra wait states %s\n", (data==0)? "enabled" : "disabled"); in cru_ctrl_write()
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H A D | 992board.cpp | 23 #define LOG_CRU (1U<<2) // CRU logging macro 500 LOGMASKED(LOG_CRU, "Invalid CRU access to %04x\n", address); in cruread() 509 LOGMASKED(LOG_CRU, "CRU %04x <- %1x\n", address, data); in cruwrite() 536 LOGMASKED(LOG_CRU, "VIDENA = %d\n", data); in cruwrite() 562 LOGMASKED(LOG_CRU, "Cassette output = %d\n", data); in cruwrite()
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