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Searched refs:LSPI_BASE (Results 1 – 3 of 3) sorted by relevance

/dports/lang/micropython/micropython-1.17/ports/cc3200/simplelink/
H A Dcc_pal.c113 MAP_SPICSEnable(LSPI_BASE); in spi_Read_CPU()
121 ulTxReg = LSPI_BASE + MCSPI_O_TX0; in spi_Read_CPU()
122 ulRxReg = LSPI_BASE + MCSPI_O_RX0; in spi_Read_CPU()
136 MAP_SPICSDisable(LSPI_BASE); in spi_Read_CPU()
169 MAP_SPICSEnable(LSPI_BASE); in spi_Write_CPU()
177 ulTxReg = LSPI_BASE + MCSPI_O_TX0; in spi_Write_CPU()
178 ulRxReg = LSPI_BASE + MCSPI_O_RX0; in spi_Write_CPU()
192 MAP_SPICSDisable(LSPI_BASE); in spi_Write_CPU()
229 ulBase = LSPI_BASE; in spi_Open()
274 unsigned long ulBase = LSPI_BASE; in spi_Close()
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/dports/lang/micropython/micropython-1.17/ports/cc3200/hal/inc/
H A Dhw_memmap.h70 #define LSPI_BASE 0x44022000 macro
/dports/lang/micropython/micropython-1.17/ports/cc3200/hal/
H A Dspi.c66 { LSPI_BASE, INT_LSPI }, // LINK SPI
77 {LSPI_BASE,APPS_CONFIG_DMA_DONE_INT_MASK_HOSTSPI_WR_DMA_DONE_INT_MASK},