/dports/lang/v8/v8-9.6.180.12/src/compiler/backend/mips64/ |
H A D | instruction-scheduler-mips64.cc | 689 latency = Latency::DIV + Latency::MFHI; in ModLatency() 1115 return Latency::DMFC1 + 1 + Latency::BRANCH + Latency::MOV_D + 4 + in Float64RoundLatency() 1116 Latency::DMFC1 + Latency::BRANCH + Latency::CVT_D_L + 2 + in Float64RoundLatency() 1126 return Latency::MFC1 + 1 + Latency::BRANCH + Latency::MOV_S + 4 + in Float32RoundLatency() 1127 Latency::MFC1 + Latency::BRANCH + Latency::CVT_S_W + 2 + in Float32RoundLatency() 1195 4 * Latency::BRANCH + Latency::SUB_S + 2 * Latency::TRUNC_L_S + in TruncUlSLatency() 1196 3 * Latency::DMFC1 + OrLatency() + Latency::MTC1 + Latency::MOV_S + in TruncUlSLatency() 1203 4 * Latency::BRANCH + Latency::SUB_D + 2 * Latency::TRUNC_L_D + in TruncUlDLatency() 1204 3 * Latency::DMFC1 + OrLatency() + Latency::DMTC1 + Latency::MOV_D + in TruncUlDLatency() 1600 Latency::MTC1 + Latency::MFC1 + Latency::MTHC1 + 1; in GetInstructionLatency() [all …]
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/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/compiler/backend/mips/ |
H A D | instruction-scheduler-mips.cc | 659 return Latency::MUL_D + Latency::ADD_D; in MaddSLatency() 667 return Latency::MUL_D + Latency::ADD_D; in MaddDLatency() 675 return Latency::MUL_S + Latency::SUB_S; in MsubSLatency() 683 return Latency::MUL_D + Latency::SUB_D; in MsubDLatency() 727 Latency::MFC1 + Latency::BRANCH + Latency::CVT_S_W; in Float32RoundLatency() 735 return Latency::BRANCH + Latency::MTC1 + 1 + Latency::MTC1 + in CvtDUwLatency() 792 Latency::BRANCH + Latency::TRUNC_W_D + Latency::MFC1; in Trunc_uw_dLatency() 796 return 1 + Latency::MTC1 + Latency::BRANCH + Latency::SUB_S + in Trunc_uw_sLatency() 813 return Latency::MFHC1 + Latency::MTC1 + Latency::MTHC1; in FmoveLowLatency() 1058 return Latency::DIV + Latency::MFHI; in ModLatency() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/compiler/backend/mips/ |
H A D | instruction-scheduler-mips.cc | 675 return Latency::MUL_D + Latency::ADD_D; in MaddSLatency() 683 return Latency::MUL_D + Latency::ADD_D; in MaddDLatency() 691 return Latency::MUL_S + Latency::SUB_S; in MsubSLatency() 699 return Latency::MUL_D + Latency::SUB_D; in MsubDLatency() 743 Latency::MFC1 + Latency::BRANCH + Latency::CVT_S_W; in Float32RoundLatency() 751 return Latency::BRANCH + Latency::MTC1 + 1 + Latency::MTC1 + in CvtDUwLatency() 808 Latency::BRANCH + Latency::TRUNC_W_D + Latency::MFC1; in Trunc_uw_dLatency() 812 return 1 + Latency::MTC1 + Latency::BRANCH + Latency::SUB_S + in Trunc_uw_sLatency() 829 return Latency::MFHC1 + Latency::MTC1 + Latency::MTHC1; in FmoveLowLatency() 1074 return Latency::DIV + Latency::MFHI; in ModLatency() [all …]
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/dports/lang/v8/v8-9.6.180.12/src/compiler/backend/mips/ |
H A D | instruction-scheduler-mips.cc | 703 return Latency::MUL_D + Latency::ADD_D; in MaddSLatency() 711 return Latency::MUL_D + Latency::ADD_D; in MaddDLatency() 719 return Latency::MUL_S + Latency::SUB_S; in MsubSLatency() 727 return Latency::MUL_D + Latency::SUB_D; in MsubDLatency() 771 Latency::MFC1 + Latency::BRANCH + Latency::CVT_S_W; in Float32RoundLatency() 779 return Latency::BRANCH + Latency::MTC1 + 1 + Latency::MTC1 + in CvtDUwLatency() 836 Latency::BRANCH + Latency::TRUNC_W_D + Latency::MFC1; in Trunc_uw_dLatency() 840 return 1 + Latency::MTC1 + Latency::BRANCH + Latency::SUB_S + in Trunc_uw_sLatency() 857 return Latency::MFHC1 + Latency::MTC1 + Latency::MTHC1; in FmoveLowLatency() 1102 return Latency::DIV + Latency::MFHI; in ModLatency() [all …]
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/dports/lang/v8/v8-9.6.180.12/src/compiler/backend/riscv64/ |
H A D | instruction-scheduler-riscv64.cc | 586 int latency = Latency::DMULT + Latency::MOVF_LOW; in Mul64Latency() 594 int latency = Latency::MULT + Latency::MOVF_HIGH; in Mulh32Latency() 965 return Latency::MOVF_HIGH_DREG + 1 + Latency::BRANCH + Latency::MOV_D + 4 + in Float64RoundLatency() 966 Latency::MOVF_HIGH_DREG + Latency::BRANCH + Latency::CVT_D_L + 2 + in Float64RoundLatency() 972 return Latency::MOVF_FREG + 1 + Latency::BRANCH + Latency::MOV_S + 4 + in Float32RoundLatency() 973 Latency::MOVF_FREG + Latency::BRANCH + Latency::CVT_S_W + 2 + in Float32RoundLatency() 981 Latency::MOVF_FREG + 1 + Latency::MOV_S; in Float32MaxLatency() 995 Latency::MOVF_FREG + 1 + Latency::MOV_S; in Float32MinLatency() 1024 4 * Latency::BRANCH + Latency::SUB_S + 2 * Latency::TRUNC_L_S + in TruncUlSLatency() 1032 4 * Latency::BRANCH + Latency::SUB_D + 2 * Latency::TRUNC_L_D + in TruncUlDLatency() [all …]
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/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/compiler/backend/mips64/ |
H A D | instruction-scheduler-mips64.cc | 678 latency = Latency::DIV + Latency::MFHI; in ModLatency() 1109 return Latency::DMFC1 + 1 + Latency::BRANCH + Latency::MOV_D + 4 + in Float64RoundLatency() 1110 Latency::DMFC1 + Latency::BRANCH + Latency::CVT_D_L + 2 + in Float64RoundLatency() 1120 return Latency::MFC1 + 1 + Latency::BRANCH + Latency::MOV_S + 4 + in Float32RoundLatency() 1121 Latency::MFC1 + Latency::BRANCH + Latency::CVT_S_W + 2 + in Float32RoundLatency() 1189 4 * Latency::BRANCH + Latency::SUB_S + 2 * Latency::TRUNC_L_S + in TruncUlSLatency() 1190 3 * Latency::DMFC1 + OrLatency() + Latency::MTC1 + Latency::MOV_S + in TruncUlSLatency() 1197 4 * Latency::BRANCH + Latency::SUB_D + 2 * Latency::TRUNC_L_D + in TruncUlDLatency() 1198 3 * Latency::DMFC1 + OrLatency() + Latency::DMTC1 + Latency::MOV_D + in TruncUlDLatency() 1602 Latency::MTC1 + Latency::MFC1 + Latency::MTHC1 + 1; in GetInstructionLatency() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/compiler/backend/mips64/ |
H A D | instruction-scheduler-mips64.cc | 701 latency = Latency::DIV + Latency::MFHI; in ModLatency() 1132 return Latency::DMFC1 + 1 + Latency::BRANCH + Latency::MOV_D + 4 + in Float64RoundLatency() 1133 Latency::DMFC1 + Latency::BRANCH + Latency::CVT_D_L + 2 + in Float64RoundLatency() 1143 return Latency::MFC1 + 1 + Latency::BRANCH + Latency::MOV_S + 4 + in Float32RoundLatency() 1144 Latency::MFC1 + Latency::BRANCH + Latency::CVT_S_W + 2 + in Float32RoundLatency() 1212 4 * Latency::BRANCH + Latency::SUB_S + 2 * Latency::TRUNC_L_S + in TruncUlSLatency() 1213 3 * Latency::DMFC1 + OrLatency() + Latency::MTC1 + Latency::MOV_S + in TruncUlSLatency() 1220 4 * Latency::BRANCH + Latency::SUB_D + 2 * Latency::TRUNC_L_D + in TruncUlDLatency() 1221 3 * Latency::DMFC1 + OrLatency() + Latency::DMTC1 + Latency::MOV_D + in TruncUlDLatency() 1625 Latency::MTC1 + Latency::MFC1 + Latency::MTHC1 + 1; in GetInstructionLatency() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 60 let Latency = Lat; 67 let Latency = Lat; 93 let Latency = 6; 98 let Latency = 6; 103 let Latency = 7; 108 let Latency = 8; 113 let Latency = 9; 117 let Latency = 9; 121 let Latency = 8; [all …]
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/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 15 // Latency: #cyc 61 let Latency = Lat; 68 let Latency = Lat; 94 let Latency = 6; 99 let Latency = 6; 104 let Latency = 7; 109 let Latency = 8; 114 let Latency = 9; 118 let Latency = 9; 122 let Latency = 8; [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 60 let Latency = Lat; 67 let Latency = Lat; 93 let Latency = 6; 98 let Latency = 6; 103 let Latency = 7; 108 let Latency = 8; 113 let Latency = 9; 117 let Latency = 9; 121 let Latency = 8; [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 60 let Latency = Lat; 67 let Latency = Lat; 93 let Latency = 6; 98 let Latency = 6; 103 let Latency = 7; 108 let Latency = 8; 113 let Latency = 9; 117 let Latency = 9; 121 let Latency = 8; [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 63 let Latency = Lat; 70 let Latency = Lat; 96 let Latency = 6; 101 let Latency = 6; 106 let Latency = 7; 111 let Latency = 8; 116 let Latency = 9; 120 let Latency = 9; 124 let Latency = 8; [all …]
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/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 15 // Latency: #cyc 61 let Latency = Lat; 68 let Latency = Lat; 94 let Latency = 6; 99 let Latency = 6; 104 let Latency = 7; 109 let Latency = 8; 114 let Latency = 9; 118 let Latency = 9; 122 let Latency = 8; [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 63 let Latency = Lat; 70 let Latency = Lat; 96 let Latency = 6; 101 let Latency = 6; 106 let Latency = 7; 111 let Latency = 8; 116 let Latency = 9; 120 let Latency = 9; 124 let Latency = 8; [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 63 let Latency = Lat; 70 let Latency = Lat; 96 let Latency = 6; 101 let Latency = 6; 106 let Latency = 7; 111 let Latency = 8; 116 let Latency = 9; 120 let Latency = 9; 124 let Latency = 8; [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 60 let Latency = Lat; 67 let Latency = Lat; 93 let Latency = 6; 98 let Latency = 6; 103 let Latency = 7; 108 let Latency = 8; 113 let Latency = 9; 117 let Latency = 9; 121 let Latency = 8; [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 63 let Latency = Lat; 70 let Latency = Lat; 96 let Latency = 6; 101 let Latency = 6; 106 let Latency = 7; 111 let Latency = 8; 116 let Latency = 9; 120 let Latency = 9; 124 let Latency = 8; [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 60 let Latency = Lat; 67 let Latency = Lat; 93 let Latency = 6; 98 let Latency = 6; 103 let Latency = 7; 108 let Latency = 8; 113 let Latency = 9; 117 let Latency = 9; 121 let Latency = 8; [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 63 let Latency = Lat; 70 let Latency = Lat; 96 let Latency = 6; 101 let Latency = 6; 106 let Latency = 7; 111 let Latency = 8; 116 let Latency = 9; 120 let Latency = 9; 124 let Latency = 8; [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 63 let Latency = Lat; 70 let Latency = Lat; 96 let Latency = 6; 101 let Latency = 6; 106 let Latency = 7; 111 let Latency = 8; 116 let Latency = 9; 120 let Latency = 9; 124 let Latency = 8; [all …]
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/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/synctools/tablegen/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 15 // Latency: #cyc 61 let Latency = Lat; 68 let Latency = Lat; 94 let Latency = 6; 99 let Latency = 6; 104 let Latency = 7; 109 let Latency = 8; 114 let Latency = 9; 118 let Latency = 9; 122 let Latency = 8; [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 60 let Latency = Lat; 67 let Latency = Lat; 93 let Latency = 6; 98 let Latency = 6; 103 let Latency = 7; 108 let Latency = 8; 113 let Latency = 9; 117 let Latency = 9; 121 let Latency = 8; [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 63 let Latency = Lat; 70 let Latency = Lat; 96 let Latency = 6; 101 let Latency = 6; 106 let Latency = 7; 111 let Latency = 8; 116 let Latency = 9; 120 let Latency = 9; 124 let Latency = 8; [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 63 let Latency = Lat; 70 let Latency = Lat; 96 let Latency = 6; 101 let Latency = 6; 106 let Latency = 7; 111 let Latency = 8; 116 let Latency = 9; 120 let Latency = 9; 124 let Latency = 8; [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
H A D | ARMScheduleA57WriteRes.td | 14 // Latency: #cyc 60 let Latency = Lat; 67 let Latency = Lat; 93 let Latency = 6; 98 let Latency = 6; 103 let Latency = 7; 108 let Latency = 8; 113 let Latency = 9; 117 let Latency = 9; 121 let Latency = 8; [all …]
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