/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/ |
H A D | m32r-desc.h | 144 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 291 { M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { (1<<MACH_BASE) } } }, 432 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | m32r-desc.h | 146 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 291 { M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { (1<<MACH_BASE) } } }, 432 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | m32r-desc.h | 146 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 291 { M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { (1<<MACH_BASE) } } }, 432 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/ |
H A D | m32r-desc.h | 156 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 291 …{ M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }… 432 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/ |
H A D | m32r-desc.h | 150 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 282 …{ M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }… 415 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/ |
H A D | m32r-desc.h | 155 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 283 …{ M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }… 416 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/ |
H A D | m32r-desc.h | 150 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 282 …{ M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }… 415 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/ |
H A D | m32r-desc.h | 150 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 282 …{ M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }… 415 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/devel/gdb/gdb-11.1/opcodes/ |
H A D | m32r-desc.h | 155 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 283 …{ M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }… 416 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/devel/gdb761/gdb-7.6.1/opcodes/ |
H A D | m32r-desc.h | 150 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 282 …{ M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }… 415 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/devel/gnulibiberty/binutils-2.37/opcodes/ |
H A D | m32r-desc.h | 155 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 283 …{ M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }… 416 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|
/dports/devel/binutils/binutils-2.37/opcodes/ |
H A D | m32r-desc.h | 155 , M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16, M32R_F_DISP24 enumerator
|
H A D | m32r-desc.c | 283 …{ M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }… 416 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_DISP24] } },
|