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Searched refs:MASK (Results 1 – 25 of 5272) sorted by relevance

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/dports/audio/midipp/midipp-2.1.1/src/
H A Dmidipp_chords.cpp158 INIT(MASK(MPP_C0) | MASK(MPP_E0) | MASK(MPP_G0) | MASK(MPP_H0) | MASK(MPP_D0), "$M9", 0),
160 INIT(MASK(MPP_C0) | MASK(MPP_E0B) | MASK(MPP_G0) | MASK(MPP_H0B) | MASK(MPP_D0), "$m9", 0),
165 INIT(MASK(MPP_C0) | MASK(MPP_E0B) | MASK(MPP_G0B) | MASK(MPP_A0) | MASK(MPP_D0), "$d9", 0),
171 INIT(MASK(MPP_C0) | MASK(MPP_E0) | MASK(MPP_G0) | MASK(MPP_A0) | MASK(MPP_F0), "64", 0),
178 INIT(MASK(MPP_C0) | MASK(MPP_E0) | MASK(MPP_G0) | MASK(MPP_H0) | MASK(MPP_F0), "$M11", 0),
187 …INIT(MASK(MPP_C0) | MASK(MPP_E0) | MASK(MPP_G0) | MASK(MPP_H0B) | MASK(MPP_F0) | MASK(MPP_A0), "13…
188 …INIT(MASK(MPP_C0) | MASK(MPP_E0) | MASK(MPP_G0) | MASK(MPP_H0) | MASK(MPP_F0) | MASK(MPP_A0), "$M1…
189 …INIT(MASK(MPP_C0) | MASK(MPP_E0B) | MASK(MPP_G0) | MASK(MPP_H0) | MASK(MPP_F0) | MASK(MPP_A0), "$m…
190 …INIT(MASK(MPP_C0) | MASK(MPP_E0B) | MASK(MPP_G0) | MASK(MPP_H0B) | MASK(MPP_F0) | MASK(MPP_A0), "$…
191 …INIT(MASK(MPP_C0) | MASK(MPP_E0) | MASK(MPP_A0B) | MASK(MPP_H0) | MASK(MPP_F0) | MASK(MPP_A0), "$a…
[all …]
/dports/science/cdk/cdk-cdk-2.3/descriptor/fingerprint/src/main/java/org/openscience/cdk/fingerprint/
H A DPubchemFingerprinter.java1935 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
1938 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
1941 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
1944 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
1947 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
1950 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
1953 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
1956 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
1959 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
1962 fp[b >> 3] |= MASK[b % 8]; in countSubstructures()
[all …]
/dports/devel/intel-graphics-compiler/SPIRV-Tools/test/
H A Dtext_to_binary.image_test.cpp70 #undef MASK
81 {MASK(Grad) | MASK(ConstOffset), 5, 6, 7}},
84 {MASK(Offset) | MASK(ConstOffsets), 5, 6}},
86 {MASK(ConstOffsets) | MASK(Sample), 5, 6}},
90 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
91 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
96 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
97 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
99 #undef MASK
210 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/SPIRV-Tools/test/
H A Dtext_to_binary.image_test.cpp70 #undef MASK
81 {MASK(Grad) | MASK(ConstOffset), 5, 6, 7}},
84 {MASK(Offset) | MASK(ConstOffsets), 5, 6}},
86 {MASK(ConstOffsets) | MASK(Sample), 5, 6}},
90 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
91 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
96 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
97 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
99 #undef MASK
210 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
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/dports/emulators/mess/mame-mame0226/3rdparty/bgfx/3rdparty/spirv-tools/test/
H A Dtext_to_binary.image_test.cpp70 #undef MASK
81 {MASK(Grad) | MASK(ConstOffset), 5, 6, 7}},
84 {MASK(Offset) | MASK(ConstOffsets), 5, 6}},
86 {MASK(ConstOffsets) | MASK(Sample), 5, 6}},
90 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
91 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
96 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
97 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
99 #undef MASK
210 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
[all …]
/dports/emulators/mame/mame-mame0226/3rdparty/bgfx/3rdparty/spirv-tools/test/
H A Dtext_to_binary.image_test.cpp70 #undef MASK
81 {MASK(Grad) | MASK(ConstOffset), 5, 6, 7}},
84 {MASK(Offset) | MASK(ConstOffsets), 5, 6}},
86 {MASK(ConstOffsets) | MASK(Sample), 5, 6}},
90 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
91 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
96 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
97 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
99 #undef MASK
210 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
[all …]
/dports/graphics/spirv-tools/SPIRV-Tools-2021.4/test/
H A Dtext_to_binary.image_test.cpp70 #undef MASK
81 {MASK(Grad) | MASK(ConstOffset), 5, 6, 7}},
84 {MASK(Offset) | MASK(ConstOffsets), 5, 6}},
86 {MASK(ConstOffsets) | MASK(Sample), 5, 6}},
90 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
91 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
96 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
97 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
99 #undef MASK
210 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/SPIRV-Tools/src/test/
H A Dtext_to_binary.image_test.cpp70 #undef MASK
81 {MASK(Grad) | MASK(ConstOffset), 5, 6, 7}},
84 {MASK(Offset) | MASK(ConstOffsets), 5, 6}},
86 {MASK(ConstOffsets) | MASK(Sample), 5, 6}},
90 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
91 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
96 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
97 MASK(Offset) | MASK(ConstOffsets) | MASK(Sample),
99 #undef MASK
210 {MASK(Bias) | MASK(Lod) | MASK(Grad) | MASK(ConstOffset) |
[all …]
/dports/converters/recode/Recode-3.6/src/
H A Dutf8.c59 put_byte ((MASK (3) << 5) | (MASK (6) & value >> 12), subtask); in transform_ucs2_utf8()
66 put_byte ((MASK (2) << 6) | (MASK (6) & value >> 6), subtask); in transform_ucs2_utf8()
113 put_byte ((MASK (5) << 3) | (MASK (6) & value >> 24), subtask); in transform_ucs4_utf8()
122 put_byte ((MASK (4) << 4) | (MASK (6) & value >> 18), subtask); in transform_ucs4_utf8()
138 put_byte ((MASK (2) << 6) | (MASK (6) & value >> 6), subtask); in transform_ucs4_utf8()
163 if ((character & MASK (4) << 4) == MASK (4) << 4) in transform_utf8_ucs4()
164 if ((character & MASK (6) << 2) == MASK (6) << 2) in transform_utf8_ucs4()
165 if ((character & MASK (7) << 1) == MASK (7) << 1) in transform_utf8_ucs4()
195 else if ((character & MASK (5) << 3) == MASK (5) << 3) in transform_utf8_ucs4()
216 else if ((character & MASK (2) << 6) == MASK (2) << 6) in transform_utf8_ucs4()
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/dports/databases/libiodbc/iODBC-3.52.15/iodbc/trace/
H A DInfo.c172 MASK (SQL_ALTER_TABLE) =
199 MASK (SQL_ASYNC_MODE) =
272 MASK (CONVERT) =
459 MASK (SQL_DDL_INDEX) =
512 MASK (SQL_DROP_TABLE) =
530 MASK (SQL_DROP_VIEW) =
649 MASK (TXN_ISOLATION) =
676 MASK (SQL_FILE_USAGE) =
696 MASK (SQL_GROUP_BY) =
717 MASK (SQL_LOCK_TYPES) =
[all …]
/dports/lang/sdcc/sdcc-4.0.0/support/regression/tests/
H A Dbitopcse.c31 # define MASK 1 macro
40 # define MASK 0xff macro
42 # define MASK 0xffff macro
88 a7 &= MASK; in testcse()
89 v &= MASK; in testcse()
90 ua2 &= MASK; in testcse()
91 uv &= MASK; in testcse()
109 a15 |= MASK; in testcse()
111 v |= MASK; in testcse()
112 ua5 |= MASK; in testcse()
[all …]
/dports/devel/xsimd/xsimd-7.6.0/include/xsimd/types/
H A Dxsimd_avx512_bool.hpp24 template <class MASK>
42 MASK& m_ref;
76 MASK m_value;
121 template <class MASK>
122 inline bool_mask_proxy<MASK>::bool_mask_proxy(MASK& ref, std::size_t idx) in bool_mask_proxy()
127 template <class MASK>
134 inline bool_mask_proxy<MASK>& bool_mask_proxy<MASK>::operator=(bool rhs) in operator =()
136 MASK tmp = static_cast<MASK>(rhs); in operator =()
191 inline batch_bool_avx512<MASK, T>::batch_bool_avx512(const MASK& rhs) in batch_bool_avx512()
197 inline batch_bool_avx512<MASK, T>::operator MASK() const in operator MASK()
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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/testsuite/gcc.target/i386/
H A Dpr103194-5.c9 atomic_fetch_or_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
11 TYPE mask = 1ll << MASK; \
15 atomic_fetch_xor_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
17 TYPE mask = 1ll << MASK; \
21 atomic_xor_fetch_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
23 TYPE mask = 1ll << MASK; \
27 atomic_fetch_and_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
33 sync_fetch_and_or_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
39 sync_fetch_and_xor_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
45 sync_xor_and_fetch_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
[all …]
H A Dpr103194-4.c8 atomic_fetch_or_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
10 TYPE mask = 1 << MASK; \
14 atomic_fetch_xor_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
16 TYPE mask = 1 << MASK; \
20 atomic_xor_fetch_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
22 TYPE mask = 1 << MASK; \
26 atomic_fetch_and_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
32 sync_fetch_and_or_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
38 sync_fetch_and_xor_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
44 sync_xor_and_fetch_##TYPE##_##MASK (_Atomic TYPE* a, TYPE MASK) \
[all …]
H A Dpr102566-13.c6 #define FOO(TYPE,MASK) \ argument
8 atomic_fetch_or_##TYPE##_##MASK (_Atomic TYPE* a) \
10 TYPE mask = 1 << MASK; \
14 atomic_fetch_xor_##TYPE##_##MASK (_Atomic TYPE* a) \
16 TYPE mask = 1 << MASK; \
22 TYPE mask = 1 << MASK; \
28 TYPE mask = 1 << MASK; \
34 TYPE mask = 1 << MASK; \
40 TYPE mask = 1 << MASK; \
46 TYPE mask = 1 << MASK; \
[all …]
H A Dpr103194-2.c6 #define FOO(RTYPE,TYPE,MASK) \ argument
8 atomic_fetch_or_##TYPE##_##MASK (_Atomic TYPE* a) \
10 TYPE mask = 1 << MASK; \
14 atomic_fetch_xor_##TYPE##_##MASK (_Atomic TYPE* a) \
16 TYPE mask = 1 << MASK; \
22 TYPE mask = 1 << MASK; \
28 TYPE mask = 1 << MASK; \
34 TYPE mask = 1 << MASK; \
40 TYPE mask = 1 << MASK; \
46 TYPE mask = 1 << MASK; \
[all …]
H A Dpr103194-3.c7 #define FOO(RTYPE, TYPE,MASK) \ argument
9 atomic_fetch_or_##TYPE##_##MASK (_Atomic TYPE* a) \
11 TYPE mask = 1ll << MASK; \
15 atomic_fetch_xor_##TYPE##_##MASK (_Atomic TYPE* a) \
17 TYPE mask = 1ll << MASK; \
23 TYPE mask = 1ll << MASK; \
29 TYPE mask = 1ll << MASK; \
35 TYPE mask = 1ll << MASK; \
41 TYPE mask = 1ll << MASK; \
47 TYPE mask = 1ll << MASK; \
[all …]
H A Dpr102566-14.c7 #define FOO(TYPE,MASK) \ argument
9 atomic_fetch_or_##TYPE##_##MASK (_Atomic TYPE* a) \
11 TYPE mask = 1ll << MASK; \
15 atomic_fetch_xor_##TYPE##_##MASK (_Atomic TYPE* a) \
17 TYPE mask = 1ll << MASK; \
23 TYPE mask = 1ll << MASK; \
29 TYPE mask = 1ll << MASK; \
35 TYPE mask = 1ll << MASK; \
41 TYPE mask = 1ll << MASK; \
47 TYPE mask = 1ll << MASK; \
[all …]
/dports/graphics/opensubdiv/OpenSubdiv-3_4_4/opensubdiv/sdc/
H A Dscheme.h80 template <typename FACE, typename MASK>
98 template <typename EDGE, typename MASK>
147 MASK& tangent1Mask, MASK& tangent2Mask,
189 void assignCornerLimitTangentMasks(VERTEX const& vertex, MASK& tan1, MASK& tan2) const;
193 void assignSmoothLimitTangentMasks(VERTEX const& vertex, MASK& tan1, MASK& tan2) const;
315 template <typename EDGE, typename MASK>
329 template <typename VERTEX, typename MASK>
346 template <typename FACE, typename MASK>
357 typename MASK::Weight vWeight = 1.0f / (typename MASK::Weight) vertCount; in ComputeFaceVertexMask()
390 template <typename EDGE, typename MASK>
[all …]
H A DbilinearScheme.h60 template <typename EDGE, typename MASK>
69 template <typename VERTEX, typename MASK>
82 template <typename VERTEX, typename MASK>
95 template <typename VERTEX, typename MASK>
104 template <typename VERTEX, typename MASK>
116 template <typename VERTEX, typename MASK>
119 MASK& tan1Mask, MASK& tan2Mask) const { in assignCornerLimitTangentMasks()
141 template <typename VERTEX, typename MASK>
144 MASK& tan1Mask, MASK& tan2Mask, int const /* creaseEnds */[2]) const { in assignCreaseLimitTangentMasks()
150 template <typename VERTEX, typename MASK>
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/nasm/x86/
H A Dinsnsa.c7138 {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19241, 233},
7139 {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19249, 233},
7140 {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19257, 234},
7155 {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19313, 233},
7156 {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19321, 233},
7157 {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19329, 234},
7344 {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19969, 234},
7346 {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19985, 234},
7378 {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20065, 234},
7380 {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20081, 234},
[all …]
H A Dinsnsd.c4860 /* 4853 */ {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19241, 233},
4861 /* 4854 */ {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19249, 233},
4862 /* 4855 */ {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19257, 234},
4869 /* 4862 */ {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19313, 233},
4870 /* 4863 */ {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19321, 233},
4871 /* 4864 */ {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19329, 234},
4951 /* 4944 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19969, 234},
4953 /* 4946 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19985, 234},
4963 /* 4956 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20065, 234},
4965 /* 4958 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20081, 234},
[all …]
/dports/devel/nasm/nasm-2.15.05/x86/
H A Dinsnsa.c7122 {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19241, 231},
7123 {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19249, 231},
7124 {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19257, 232},
7139 {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19313, 231},
7140 {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19321, 231},
7141 {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19329, 232},
7328 {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19969, 232},
7330 {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19985, 232},
7362 {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20065, 232},
7364 {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20081, 232},
[all …]
H A Dinsnsd.c4844 /* 4837 */ {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19241, 231},
4845 /* 4838 */ {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19249, 231},
4846 /* 4839 */ {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19257, 232},
4853 /* 4846 */ {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19313, 231},
4854 /* 4847 */ {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19321, 231},
4855 /* 4848 */ {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19329, 232},
4935 /* 4928 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19969, 232},
4937 /* 4930 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19985, 232},
4947 /* 4940 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20065, 232},
4949 /* 4942 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20081, 232},
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/third_party/nasm/x86/
H A Dinsnsa.c6768 {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+15548, 225},
6769 {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+15556, 225},
6770 {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+15564, 226},
6785 {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+15620, 225},
6786 {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+15628, 225},
6787 {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+15636, 226},
6974 {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16276, 226},
6976 {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16292, 226},
7008 {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16372, 226},
7010 {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16388, 226},
[all …]

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