Searched refs:MASK_SH1ADD (Results 1 – 9 of 9) sorted by relevance
/dports/devel/binutils/binutils-2.37/include/opcode/ |
H A D | riscv-opc.h | 477 #define MASK_SH1ADD 0xfe00707f macro 1094 DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD)
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/dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/ |
H A D | riscv-opc.h | 477 #define MASK_SH1ADD 0xfe00707f macro 1094 DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD)
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/dports/devel/gnulibiberty/binutils-2.37/include/opcode/ |
H A D | riscv-opc.h | 477 #define MASK_SH1ADD 0xfe00707f macro 1094 DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD)
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/dports/devel/gdb/gdb-11.1/include/opcode/ |
H A D | riscv-opc.h | 477 #define MASK_SH1ADD 0xfe00707f macro 1094 DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD)
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/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/ |
H A D | riscv-opc.c | 816 {"sh1add", 0, INSN_CLASS_ZBA, "d,s,t", MATCH_SH1ADD, MASK_SH1ADD, match_opcode, 0 },
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/dports/devel/gdb/gdb-11.1/opcodes/ |
H A D | riscv-opc.c | 816 {"sh1add", 0, INSN_CLASS_ZBA, "d,s,t", MATCH_SH1ADD, MASK_SH1ADD, match_opcode, 0 },
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/dports/devel/gnulibiberty/binutils-2.37/opcodes/ |
H A D | riscv-opc.c | 816 {"sh1add", 0, INSN_CLASS_ZBA, "d,s,t", MATCH_SH1ADD, MASK_SH1ADD, match_opcode, 0 },
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/dports/devel/binutils/binutils-2.37/opcodes/ |
H A D | riscv-opc.c | 816 {"sh1add", 0, INSN_CLASS_ZBA, "d,s,t", MATCH_SH1ADD, MASK_SH1ADD, match_opcode, 0 },
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/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/ |
H A D | encoding.h | 797 #define MASK_SH1ADD 0xfe00707f macro 3351 DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD)
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