| /dports/devel/radare2/radare2-5.1.1/libr/asm/arch/riscv/ |
| H A D | riscv-opc.c | 469 {"fle.s", "F", "d,S,T", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
471 {"fge.s", "F", "d,T,S", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
|
| H A D | riscv-opc.h | 316 #define MATCH_FLE_S 0xa0000053 macro
929 DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
|
| /dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/ |
| H A D | riscv-opc.h | 318 #define MATCH_FLE_S 0xa0000053 macro
983 DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
|
| /dports/devel/binutils/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 342 #define MATCH_FLE_S 0xa0000053 macro
1031 DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
|
| /dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 342 #define MATCH_FLE_S 0xa0000053 macro
1031 DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
|
| /dports/devel/gnulibiberty/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 342 #define MATCH_FLE_S 0xa0000053 macro
1031 DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
|
| /dports/devel/gdb/gdb-11.1/include/opcode/ |
| H A D | riscv-opc.h | 342 #define MATCH_FLE_S 0xa0000053 macro
1031 DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
|
| /dports/devel/arm-elf-binutils/binutils-2.37/opcodes/ |
| H A D | riscv-opc.c | 572 {"fle.s", 0, INSN_CLASS_F, "d,S,T", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
574 {"fge.s", 0, INSN_CLASS_F, "d,T,S", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
|
| /dports/devel/gdb/gdb-11.1/opcodes/ |
| H A D | riscv-opc.c | 572 {"fle.s", 0, INSN_CLASS_F, "d,S,T", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
574 {"fge.s", 0, INSN_CLASS_F, "d,T,S", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
|
| /dports/devel/gnulibiberty/binutils-2.37/opcodes/ |
| H A D | riscv-opc.c | 572 {"fle.s", 0, INSN_CLASS_F, "d,S,T", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
574 {"fge.s", 0, INSN_CLASS_F, "d,T,S", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
|
| /dports/devel/binutils/binutils-2.37/opcodes/ |
| H A D | riscv-opc.c | 572 {"fle.s", 0, INSN_CLASS_F, "d,S,T", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
574 {"fge.s", 0, INSN_CLASS_F, "d,T,S", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 },
|
| /dports/devel/openocd/openocd-0.11.0/src/target/riscv/ |
| H A D | encoding.h | 550 #define MATCH_FLE_S 0xa0000053 macro
2198 DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
|
| /dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/ |
| H A D | encoding.h | 552 #define MATCH_FLE_S 0xa0000053 macro
3229 DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
|