| /dports/devel/radare2/radare2-5.1.1/libr/asm/arch/riscv/ |
| H A D | riscv-opc.h | 90 #define MATCH_XOR 0x4033 macro
816 DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
|
| H A D | riscv-opc.c | 270 {"xor", "I", "d,s,t", MATCH_XOR, MASK_XOR, match_opcode, 0 },
|
| /dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/ |
| H A D | riscv-opc.h | 90 #define MATCH_XOR 0x4033 macro
869 DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
|
| /dports/devel/binutils/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 110 #define MATCH_XOR 0x4033 macro
916 DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
|
| /dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 110 #define MATCH_XOR 0x4033 macro
916 DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
|
| /dports/devel/gnulibiberty/binutils-2.37/include/opcode/ |
| H A D | riscv-opc.h | 110 #define MATCH_XOR 0x4033 macro
916 DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
|
| /dports/devel/gdb/gdb-11.1/include/opcode/ |
| H A D | riscv-opc.h | 110 #define MATCH_XOR 0x4033 macro
916 DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
|
| /dports/devel/openocd/openocd-0.11.0/src/target/riscv/ |
| H A D | encoding.h | 376 #define MATCH_XOR 0x4033 macro
2111 DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
|
| /dports/devel/arm-elf-binutils/binutils-2.37/opcodes/ |
| H A D | riscv-opc.c | 367 {"xor", 0, INSN_CLASS_I, "d,s,t", MATCH_XOR, MASK_XOR, match_opcode, 0 },
|
| /dports/devel/gdb/gdb-11.1/opcodes/ |
| H A D | riscv-opc.c | 367 {"xor", 0, INSN_CLASS_I, "d,s,t", MATCH_XOR, MASK_XOR, match_opcode, 0 },
|
| /dports/devel/gnulibiberty/binutils-2.37/opcodes/ |
| H A D | riscv-opc.c | 367 {"xor", 0, INSN_CLASS_I, "d,s,t", MATCH_XOR, MASK_XOR, match_opcode, 0 },
|
| /dports/devel/binutils/binutils-2.37/opcodes/ |
| H A D | riscv-opc.c | 367 {"xor", 0, INSN_CLASS_I, "d,s,t", MATCH_XOR, MASK_XOR, match_opcode, 0 },
|
| /dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/ |
| H A D | encoding.h | 372 #define MATCH_XOR 0x4033 macro
3139 DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
|